A digital clock manager is provided. The digital clock manager generates an output clock signal that causes a skewed clock signal to be synchonized with a reference clock signal. Furthermore, the digital clock manager generates a frequency adjusted clock signal that is synchronized with the output clock signal during concurrence periods. The digital clock manager includes a delay lock loop and a digital frequency synthesizer. The delay lock loop and a digital frequency synthesizer. The output clock signal lags the synchrozing clock signal by a DLL output delay. Similarly, the frequency adjusted clock signal lags the synchronizing clock signal by a DFS output delay. By matching the DLL output delay to the DFS output delay, the digital clock manager synchronizes the output clock signal and the frequency adjusted clock signal.

Synchronized multi-output digital clock manager

A spread spectrum system having a self-oscillating delay-line digital pulse width modulator and a method for mitigating electromagnetic interference. The spread spectrum system has a pseudo-random pattern generator connected to a digital-to-analog converter, which in turn is connected to a linear regulator. The linear regulator receives a reference voltage from the digital-to-analog converter and creates a frequency varying voltage that serves as an input voltage for delay elements of a delay-line based digital pulse width modulator. In response to frequency varying input signal, the delay-line based digital pulse width modulator generates a frequency varying voltage that is input to a switching network to vary its switching frequency.

Circuit and method for reducing electromagnetic interference

A method of producing a clock signal with reduced electromagnetic interference spectral components includes providing a first clock signal; producing a second clock signal by delaying the first clock signal; and generating a jittered clock signal by switching between the first clock signal and the second clock signal at times selected responsive to a random number generator. A GSM phone comprises a clock configured to produce a first clock signal; a delay element coupled to the clock to produce a second clock signal by delaying the first clock signal; a multiplexer coupled to the clock and to the delay element to select between the clock and the delay element; a random number generator coupled to the multiplexer wherein the multiplexer generates a jittered clock signal by switching between the first clock signal and the second clock signal responsive to the random number generator; and a plurality of GSM phone components respectively coupled to the multiplexer to use the jittered clock signal as an input clock for the component.

Clock circuit, gsm phone, and methods of reducing electromagnetic interference

The clock signal is the dominant source of electromagnetic interference (EMI) for many digital electronic devices. EMI generated by these electronic devices must be suppressed to avoid interference with other electronic devices and to satisfy FCC regulations. The present invention seeks to reduce EMI emissions by phase-modulating the clock signal using tunable delay lines. Phase modulation causes a spreading of the energy spectrum of the clock signal thereby reducing EMI emissions. In addition, the present invention is capable of generating a wide energy spectrum in a short time interval. Furthermore, the present invention can be similarly applied to other signals which exhibit a periodic or timing nature due to a correlation with the clock signal.

EMI reduction using tunable delay lines

A low noise clock oscillator in standard surface mount plastic or ceramic form. With the same soldering pads design such devices can be replace with a convention standard surface mount clock oscillator to reduce Electro-magnetic Interference or RFI (Radio Frequency Interference) without redesign of the main board. The oscillator is characterized by using a spectrum spread clock generator and a spread controller on an elevated platform to reduce common mode emission currents.

Low electromagnetic interference clock oscillator module

A system of spreading the energy of higher harmonic frequencies in digital circuits to lower the interference to bandpass receivers is disclosed. A set of passive, impedance-regulated circuits, preferably housed in a standard enclosure, comprises a power restoring unit, a modulating signal generator, an internal oscillator and an impedance spreading unit. The circuits are equivalent to passive resonators such as crystal resonators used in standard oscillators. Any existing standard oscillator that uses common crystal resonators can be transformed into a spectrum-spread oscillator by replacing the crystal resonator with the disclosed circuit, whereby a tightly controlled small frequency spreading occurs in the fundamental clock frequency. Further an active oscillator is disclosed wherein a spreading circuit spreads the frequency of the clock signal originally generated by the oscillator based on a sequence of processing the original clock signal. The processing includes the use of a plurality of delay elements based on a certain topology, the comparisons between the clock signal and a set of predefine parameters so as to create a frequency offset. The spreading circuit, without using additional clocking sources, spreads the frequency of the clock signal with respect to the comparisons.

Mohammed A. Safai

Papers

Method and apparatus for reducing radiated electromagnetic emissions from harmonic frequencies for electronic equipment