Reversible logic circuits have been historically motivated by theoretical research in low-power electronics as well as practical improvement of bit manipulation transforms in cryptography and computer graphics. Recently, reversible circuits have attracted interest as components of quantum algorithms, as well as in photonic and nano-computing technologies where some switching devices offer no signal gain. Research in generating reversible logic distinguishes between circuit synthesis, postsynthesis optimization, and technology mapping. In this survey, we review algorithmic paradigms—search based, cycle based, transformation based, and BDD based—as well as specific algorithms for reversible synthesis, both exact and heuristic. We conclude the survey by outlining key open challenges in synthesis of reversible and quantum logic, as well as most common misconceptions.

Synthesis and optimization of reversible circuits—a survey

Optimization of the interaction distance between qubits to map a quantum circuit into one-dimensional quantum architectures is addressed. The problem is formulated as the Minimum Linear Arrangement (MinLA) problem. To achieve this, an interaction graph is constructed for a given circuit, and multiple instances of the MinLA problem for selected subcircuits of the initial circuit are formulated and solved. In addition, a lookahead technique is applied to improve the cost of the proposed solution which examines different subcircuit candidates. Experiments on quantum circuits for quantum Fourier transform and reversible benchmarks show the effectiveness of the approach.

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Optimization of quantum circuits for interaction distance in linear nearest neighbor architectures

Research in the domain of quantum computation is mainly driven by their promising applications e.g., for factorization or database search. At the same time, physical developments for this emerging technology constantly lead to new constraints to be addressed by logic designers. The limited interaction distance between qubits, the elementary information storage in quantum circuits, is one of the most common restrictions, leading to the fact that, for many quantum architectures, computations can only be performed on adjacent (i.e., nearest neighbor) qubits. Motivated by that, optimization of quantum circuits with respect to this restriction has become an intensely considered research topic. In this paper, we briefly review existing approaches that have been proposed in the past for this purpose. We particularly consider that almost all existing solutions are of heuristic nature, i.e., do not guarantee an optimal solution. In order to address this, exact alternatives are introduced which make use of the deductive power of constraint solvers. By this, we are able to perform a qualitative evaluation of the performance of existing (heuristic) solutions for linear nearest neighbor quantum circuit optimization.

Exact Reordering of Circuit Lines for Nearest Neighbor Quantum Architectures

Reversible circuits for modular multiplication Cx%M with x < M arise as components of modular exponentiation in Shor's quantum number-factoring algorithm. However, existing generic constructions focus on asymptotic gate count and circuit depth rather than actual values, producing fairly large circuits not optimized for specific C and M values. In this work, we develop such optimizations in a bottom-up fashion, starting with most convenient C values. When zero-initialized ancilla registers are available, we reduce the search for compact circuits to a shortest-path problem. Some of our modular-multiplication circuits are asymptotically smaller than previous constructions, but worst-case bounds and average sizes remain Θ(n2). In the context of modular exponentiation, we offer several constant-factor improvements, as well as an improvement by a constant additive term that is significant for few-qubit circuits arising in ongoing laboratory experiments with Shor's algorithm.

Constant-optimized quantum circuits for modular multiplication and exponentiation

Motivated by its promising applications e.g. for database search or factorization, significant progress has been made in the development of automated design methods for quantum circuits. But in order to keep up with recent physical developments in this domain, new technological constraints have to be considered. Limited interaction distance between gate qubits is one of the most common of these constraints. This led to the development of several strategies aiming at making a given quantum circuit nearest neighbor-compliant by inserting SWAP gates into the existing structure. Usually these strategies are of heuristic nature. In this work, we present an exact approach that enables nearest neighbor-compliance by inserting a minimal number of SWAP gates. Experiments demonstrate the applicability of the approach which enabled a comparison of results obtained by heuristic methods to the actual optimum.

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Optimal SWAP gate insertion for nearest neighbor quantum circuits

Reversible logic has applications in various research areas including low-power design and quantum computation. In this paper, a rule-based optimization approach for reversible circuits is proposed which uses both negative and positive control Toffoli gates during the optimization. To this end, a set of rules for removing NOT gates and optimizing sub-circuits with common-target gates are proposed. To evaluate the proposed approach, the best-reported synthesized circuits and the results of a recent synthesis algorithm which uses both negative and positive controls are used. Our experiments reveal the potential of the proposed approach in optimizing synthesized circuits.

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Rule-based optimization of reversible circuits

In this paper, the problem of constructing an efficient quantum circuit for the implementation of an arbitrary quantum computation is addressed. To this end, a basic block based on the cosine-sine decomposition method is suggested which contains $l$ qubits. In addition, a previously proposed quantum-logic synthesis method based on quantum Shannon decomposition is recursively applied to reach unitary gates over $l$ qubits. Then, the basic block is used and some optimizations are applied to remove redundant gates. It is shown that the exact value of $l$ affects the number of one-qubit and CNOT gates in the proposed method. In comparison to the previous synthesis methods, the value of $l$ is examined consequently to improve either the number of CNOT gates or the total number of gates. The proposed approach is further analyzed by considering the nearest neighbor limitation. According to our evaluation, the number of CNOT gates is increased by at most a factor of $\frac{5}{3}$ if the nearest neighbor interaction is applied.

Block-based quantum-logic synthesis

In this paper, the problem of constructing an efficient quantum circuit for the imple-mentation of an arbitrary quantum computation is addressed. To this end, a basic blockbased on the cosine-sine decomposition method is suggested which contains l qubits.In addition, a previously proposed quantum-logic synthesis method based on quantumShannon decomposition is recursively applied to reach unitary gates over l qubits. Then,the basic block is used and some optimizations are applied to remove redundant gates.It is shown that the exact value of l affects the number of one-qubit and CNOT gates inthe proposed method. In comparison to the previous synthesis methods, the value of l isexamined consequently to improve either the number of CNOT gates or the total numberof gates. The proposed approach is further analyzed by considering the nearest neighborlimitation. According to our evaluation, the number of CNOT gates is increased by atmost a factor of 5/3 if the nearest neighbor interaction is applied.

In this paper, simultaneous reduction of circuit depth and synthesis cost of reversible circuits in quantum technologies with limited interaction is addressed. We developed a cycle-based synthesis algorithm which uses negative controls and limited distance between gate lines. To improve circuit depth, a new parallel structure is introduced in which before synthesis a set of disjoint cycles are extracted from the input specification and distributed into some subsets. The cycles of each subset are synthesized independently on different sets of ancillae. Accordingly, each disjoint set can be synthesized by different synthesis methods. Our analysis shows that the best worst-case synthesis cost of reversible circuits in the linear nearest neighbor architecture is improved by the proposed approach. Our experimental results reveal the effectiveness of the proposed approach to reduce cost and circuit depth for several benchmarks.

Depth-optimized reversible circuit synthesis

An elementary flux mode (EFM) is a pathway with minimum set of reactions that are functional in steady-state constrained space. Due to the high computational complexity of calculating EFMs, different approaches have been proposed to find these flux-balanced pathways. In this paper, an approach to find a subset of EFMs is proposed based on a graph data model. The given metabolic network is mapped to the graph model and decisions for reaction inclusion can be made based on metabolites and their associated reactions. This notion makes the approach more convenient to categorize the output pathways. Implications of the proposed method on metabolic networks are discussed.

Mona Arabzadeh

Papers

Rule-based optimization of reversible circuits

Block-based quantum-logic synthesis

Block-based quantum-logic synthesis

Depth-optimized reversible circuit synthesis

A graph-based approach to analyze flux-balanced pathways in metabolic networks.