Distortion and instability due to echoes in conference communications is reduced through the use of an echo estimating filter disposed in a conference bridging circuit. This circuit includes a signal combiner which receives information signals from each of the parties in the conference communications and provides an output signal which is a combination of the received information signals and an echo compensation signal. The echo estimating filter provides this echo compensation signal in response to the combiner output signal. Advantageously, the echo estimating filter can be fixed or adaptive. In the latter case, the adaptation can be in response to the received information signals or to training sequences.

Technique for reducing echoes in conference communications

In a LPC speech signal decoder, background noise is simulated during periods of silence at the transmitting end based upon a background noise frame containing information about the background noise at the sending end. When the silence persists, the transmitter periodically updates the background noise frame previously send by transmitting an updating background noise frame. When an update background noise frame is received, an interpolation is performed so as to make the simulated background noise sound natural to the listener. The interpolation process includes a step of selecting between interpolation spectrum parameters which are produced by the interpolation process and the updated spectrum parameters which are based solely upon the most recent updated background noise frame.

Speech decoder having an interpolation circuit for updating background noise

The invention discloses a novel synthesis method of 2, 3, 5, 6-tetramethylpyrazine and belongs to the technical field of synthesis of perfumes, medicines and pesticides. The reaction comprises addition, rearrangement, condensation and oxidation, which are performed in a reaction and sublimation route device, and a qualified product is obtained by steam distillation. According to the synthesis method disclosed by the invention, the process steps are simplified, material resources are fully utilized, and the synthesis method further has the advantages of low energy consumption, high product yield, environmental friendliness, low production cost, and simplicity and rapidness in operation, and is further conductive to industrial mass production. The synthesis method disclosed by the invention can be widely applied to industrial production of 2, 3, 5, 6-tetramethylpyrazine. By adopting the novel synthesis process disclosed by the invention, the 2, 3, 5, 6-tetramethylpyrazine product can be produced, and the 2, 3, 5, 6-tetramethylpyrazine product can be widely used as the perfume, a food additive, a photosensitizer, the medicine, the pesticide and the like.

Novel synthesis method of 2, 3, 5, 6-tetramethylpyrazine

A processor includes a loop counter that is reset to 0 when a loop instruction for executing a process in a loop from a loop start address to a loop end address is issued, a data memory that receives data that is used for executing a process in the loop, in which the data is transferred from outside, a calculator that uses the data transferred to the data memory to execute the process in the loop, a data counter that increments the loop counter by 1 every time a certain amount of data that is used for executing a process in the loop is transferred from outside to a data memory, and a loop controller that decrements the loop counter by 1 and causes the calculator to execute the process in the loop when a loop count value of the loop counter is not 0.

Processor, and method of loop count control by processor

PURPOSE:To provide an excellent reinforcing effect by bending a flat reinforcing bar having an oval cross section with the flat face set to the inside, and arranging it around a main reinforcement as a shear reinforcing bar. CONSTITUTION:A flat reinforcing bar 1 having an oval cross section is bent and arranged around a main reinforcement 3 with the flat face set to the inside as a shear reinforcing bar. When the flat reinforcing bar 1 is used, the bending diameter D is made smaller than when a circular reinforcing bar 4 is used, and the position of the main reinforcement 3 is arranged near the outside of concrete. The concrete quantity and reinforcing bar quantity are reduced, and the structure weight can be reduced.

Reinforcing bar and bar arrangement for reinforced concrete structure

PURPOSE:To inform the abnormality of a circuit to a caller without increasing remarkably hardware by providing a means for generating an alarm which is different from a regular busy tone, when out of synchronism is detected, on a control device connected to a switchboard. CONSTITUTION:Call control devices 13-A-13-C are connected to a switchboard 11 through each circuit 12-A-12-C, centering around the switchboard 11 of a digital telephone system 10, and digital telephone sets 14-A-14-C are connected to each device 13-A-13-C, respectively. Also, a regular hybrid 21, hook detecting part 24, control part 25, transmitting part 26, synchronization detecting part 27 and a receiving part 29 are provided on said each device 13-A-13-C, and also a switching part 22, alarm sound generating part 23 and a signaling part 28 are provided newly. In such a way, when the detecting part 27 detects out of synchronism, an alarm sound which is different from a regular busy tone is generated from the generating part 23, and the abnormality of the circuits 12-A-12-C is informed to a caller.

Circuit abnormality informing method

Signal sound reproduction system

Noise suppression system

PURPOSE:To reduce the operating time and improve the accessing speed to a memory by accessing the memory by using the content of an index register as an address signal and forming the next access address while the instruction is executed. CONSTITUTION:When, for example, an instruction for accessing #1 memory M is given and the #1 operand of the (2) is given as the offset value to be used for forming an address to be accessed in the next instruction, the memory M is accessed by using the content of an index register IDR as an address because an operand is set in the index register IDR in advance, #0 data of the (6) are read out after t2 and used for the #1 instruction. During the execution of the instruction, operation is performed by an arithmetic circuit ALU and the operated result is set in the index register IDR as the next address by the #1 set signal of the (4).

System for controlling memory access

PURPOSE:To suppress the increase in the number of program steps when the solution of a recurrent formula, etc is found, by increasing the number of times of looping of the inner loop whenever the outer loop advances in case where processing is performed by using a double loop CONSTITUTION:When a counter 7 is used for controlling the outer loop and another counter 8 is used for controlling the inner loop, a value is set in the counter 7 by a program instruction and, at the same time, a mode is set by a mode setting signal 13 The counter 7 makes counter operations whenever the outer loop is executed and, on the other hand, values modified to fixed values to the frequency of the outer loop are set in the counter 8 by means of an arithmetic circuit 5 whenever the outer loop is executed and the mode is set by a set signal 11 When the counters 7 and 8 are set to the up-mode and down-mode, respectively, under this condition, the executing frequency of the inner loop is increased whenever the loop frequency of the outer loop advances by one This is effective when solution of a recurrent formula, etc is found

Moriyama Yutaka

Papers

Circuit abnormality informing method

Signal sound reproduction system

Noise suppression system

System for controlling memory access

Loop controlling system