The method for fabrication of a self-aligned gate CMOS structure which employs no additional masking steps as compared to the standard CMOS fabrication process, this improved process providing the advantages of self-alignment between the N+ and P+ source and drain diffusions with respect to their gate regions, and metal contact openings which do not overlap the edges of the P+ or N+ source and drain regions. The self-aligning gate region is defined by a silicon nitride gate layer. Several embodiments of the novel process are described.

Self-aligned CMOS process for bulk silicon and insulating substrate device

A complementary semiconductor device includes P-and N-type semiconductor regions separately formed in a semiconductor substrate and having substantially the same concentration of impurities. N-and P-channel type silicon gate field effect transistors are formed in the P-and N-channel type regions, respectively. Gate electrodes of the P-and N-channel type silicon gate field effect transistors are formed by polycrystalline silicons of the same conductivity type. An impurity of the same conductivity type is doped into both the semiconductor regions to provide channel doped regions.

Method for preparing complementary semiconductor device

The invention relates to surgical instruments, a computer program element which provides control or information relating to the surgical instruments, a computer program providing the same, a computer readable medium comprising the computer program, a method for implementing a computer-aided means of guiding a surgeon through a desired surgical procedure and to a computer aided surgical procedure. In a preferred embodiment, the invention relates to instruments, a computer program element, computer programs, a computer readable medium and methods for use in knee replacement operations.

Apparatus, operating means and process

The polysilicon gate electrode of a MOS transistor may be substantially completely converted into a metal silicide without sacrificing the drain and source junctions in that a thickness of the polysilicon layer, for forming the gate electrode, is targeted to be substantially converted into metal silicide in a subsequent silicidation process. The gate electrode, substantially comprised of metal silicide, offers high conductivity even at critical dimensions in the deep sub-micron range, while at the same time the effect of polysilicon gate depletion is significantly reduced. Manufacturing of the MOS transistor, having the substantially fully-converted metal silicide gate electrode, is essentially compatible with standard MOS process technology.

Method of forming a metal silicide gate in a standard MOS process sequence

A semiconductor device comprises a semiconductor body of one conductivity type, at least one semiconductor region of the opposite conductivity type formed in the semiconductor body and having a surface flush with the surface of the semiconductor body, an insulative or semi-insulative film formed on the semiconductor body or semiconductor region through a passivation layer and having a fixed charge, positive or negative, and an electrode metal layer connected to at least one of the semiconductor body and region and formed locally on the film directly or through a passivation layer. The semiconductor body or region is of N conductivity type when the film has a positive fixed charge and of P conductivity type when the film has a negative fixed charge.

Semiconductor device with selective nitride layer over channel stop

An enhancement-type complementary MIS-type semiconductor is provided wherein the absolute value of the threshold voltage does not exceed 1.2 volts in both the P and N channels. The device is formed with either an N-type silicon single-crystal substrate having a specific resistance of more than 30 ohms-cm. and the crystal orientation characterized as ''''100,'''' or a silicon epitaxial substrate. The gate insulating film is formed from two layers, a silicon oxide film engaging the surface of the substrate and a silicon nitride film on the surface of said silicon oxide film. A vacuum evaporated film of aluminum defines the electroconductive electrodes of the device.

Motoyoshi Sakamoto

Papers

Complementary MIS-type semiconductor devices and methods for manufacturing same