Reversible Logic has emerged as a topic of massive research owing to its promising heat arresting attribute and being an inherent part of quantum computing. CMOS has already started witnessing physical threshold limits with architectures based on classical irreversible logic functions. Several application specific reversible gates have been proposed in the previous decade. This communication proposes a novel four variable reversible gate capable of implementing a standalone full adder/subtractor. The gate has exhibited better statistics in peer comparisons. The work in this paper illustrates the complete design and construction of the proposed gate along with the quantum realization.

Logic Design and Quantum Mapping of a Novel Four Variable Reversible s2c2 Gate

The rising research in reversible logic, estimating it to be latent alternative for CMOS, has paved the way for several proposals for reversible logic synthesis. Application oriented reversible circuit designs are witnessed in almost every aspect of digital communication. It is this very interest that the present study proposes binary to gray code converters and vice versa as two independent four variable reversible gates. The converters have been conceptualized as four variable reversible gates having potential to realize efficient parity generator/checker circuits exhibiting better peer comparison results. Hence the work in this paper may find acceptance in reversible cryptography as well as XOR intensive operations in image processors. Also by virtue of definition, reversibility supports lossless communication as information loss is arrested in subsequent stages of information transfer in a reversible function.

Reversible Code Converters Based on Application Specific Four Variable Reversible Gates

In the arena of reversible computation, several algorithms for synthesizing reversible circuit have contributed a major part. Good number of algorithms for optimized reversible circuit design is available in literature. In our previous work we proposed a synthesis algorithm for four variable reversible circuits using Toffoli Gates only, which outperforms already proposed synthesis algorithm in terms of both gate count and as well as quantum cost. The current work proposes another synthesis algorithm for four bit reversible functions using pre-designed templates combining both Toffoli and Fredkin gates. Template design considers optimal Control Sets for combined Toffoli and Fredkin gates in terms of gate count. These combined Toffoli-Fredkin templates further improve upon the gate count. Comparative study of previously proposed synthesized algorithms having Toffoli gates alone with mixed Toffoli-Fredkin version clearly exhibits the gate count improvements.

A Novel Approach Towards Optimized Synthesis of Four Variable Reversible Function Using Toffoli-Fredkin Based Mixed Templates

Tersinir kuantum devreleri farklı türde ve sayıdaki kuantum kapıları kullanılarak oluşturulmaktadır. Kuantum devreleri oluşturulurken kullanılacak kapı sayısının optimize edilmesi maliyeti ve karmaşıklığı azaltmaktadır. Tersinir kuantum devrelerinde durum tablolarının elde edilmesi ve optimizasyonu için giriş sayısı, çıkış sayısı ve kapı sayılarının bilinmesi önemlidir. Ayrıca bu parametreler kuantum devrelerinde oluşabilecek arızaların tespit edilmesinde de kullanılmaktadır. Literatürde kuantum devreleri için giriş, çıkış ve kapı sayılarının tespitinde eksiklik vardır. Ayrıca, literatürde yapılan uygulamaların test edilebilmesi için sınırlı sayıdaki standart kuantum devreleri kullanılmaktadır. Bu kapsamda kullanılabilecek veri setlerinin çok az olduğu tespit edilmiştir. Literatürdeki bu eksikliklerin giderilmesi çalışmamızın amacını, önerilen yöntem ise çalışmamızın özgünlüğünü oluşturmaktadır. Bu çalışmada Yolo (You Only Look Once) tabanlı yöntemler kullanılarak kapı sayısı ve giriş sayısı tespit edilmiştir. “MATLAB” ve “RCViewer+” programları kullanılarak CNOT, Feynman ve Toffoli kapılarından oluşan büyük bir veri seti oluşturulmuştur. Bu çalışmada, 1-8 kapı sayısına ve 3-7 giriş sayısına sahip toplamda 5000 adet kuantum devre oluşturulmuştur. Elde edilen veri setleri üzerinde kapılar ve girişler etiketlenmiştir. Etiketlenen veri setleri üzerinde 80:20 eğitim ve test oranı ile YoloV4, YoloV7 ve YoloV7x yöntemleri uygulanmıştır. YoloV4, YoloV7 ve YoloV7x yöntemleri için sırasıyla %87.1, %89.7 ve %89.3 mAP hesaplanmıştır. Önerilen yöntem 2800 iterasyon çalıştırılmış ve en iyi sonuç YoloV7 algoritması ile elde edilmiştir.

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A YOLO-Based Method for Detection of Gate and Input in Quantum Circuits

Throughout the last decade, reversible logic has been an emerging research topic. Over the years, a considerable number of application specific new reversible gates with varied characteristics have been proposed. Barring few, most of the gates lack fundamental quantum mapping in contemporary literature. This paper takes into account the four variable reversible gates those have been proposed and provides the Toffoli mapping using positive control lines. The authors optimize the designs using negative control lines wherever possible. The quantum cost, quantum gate count and two-qubit gate count required to implement those reversible gates have been provided which will set a benchmark for optimized gate choice for complex Boolean realizations. The authors also provide Hamming Distance based Complexity analysis.

Munna Prasad

Papers

Comprehensive quantum analysis of existing four variable reversible gates