M
Murali Varanasi
Researcher at University of North Texas
Publications - 43
Citations - 517
Murali Varanasi is an academic researcher from University of North Texas. The author has contributed to research in topics: Error detection and correction & Encryption. The author has an hindex of 14, co-authored 41 publications receiving 455 citations. Previous affiliations of Murali Varanasi include University of Florida & University of South Florida.
Papers
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Transactions on knowledge and data engineering
Gerald L. Engel,Deborah M. Cooper,Carl K. Chang,Michael R. Williams,Christina M. Schober,Yervant Zorian,Murali Varanasi,Stephanie M. White,Stephen B. Seidman,Rangachar Kasturi,Gene F. Hoffnagle,Stephen L. Diamond,Oscar N. Garcia,Doris L. Carver,David W. Hennage,Mark A. Grant,Michel Israel,Rohit Kapur,Kathleen M. Swigger,Makoto Takizawa,Mark Christensen,Alan Clements,Annie Combelles,Ann Q. Gates,James D. Isaak,Susan A. Mengel,Jean M. Bacon,George V. Cybenko,Richard A. Kemmerer,Itaru Mimura,Watanabe Building,Ieee Officers,W. Cleon Anderson,Michael R. Lightner,Arthur W. Winston,Mohamed El-Hawary,Joseph V. Lillie,Moshe Kam,Leah H. Jamieson,Marc T. Apter,James T. Carlo,Ralph W. Wyndrum,Gerard A. Alphonse +42 more
Proceedings ArticleDOI
Cooperative Network Coding for Wireless Ad-Hoc Networks
TL;DR: This study proposes a unified two-way traffic model that can characterize the features of both the cooperative communication and network coding schemes and develops a new cooperative network coding scheme to further improve the system throughput.
Proceedings ArticleDOI
Design of Sensor-Embedded Radio Frequency Identification (SE-RFID) Systems
TL;DR: In this article, a real-time Health Monitoring System (HEMS) based on Sensor-Embedded Radio Frequency Identification (SE-RFID) is proposed and analyzed using EDA software.
Proceedings ArticleDOI
A high-performance VLSI architecture for advanced encryption standard (AES) algorithm
TL;DR: A high-performance, high throughput, and area efficient architecture for the VLSI implementation of the AES algorithm where the subkeys, required for each round of the Rijndael algorithm, are generated in real-time by the key-scheduler module by expanding the initial secret key, thus reducing the amount of storage for buffering.
Proceedings ArticleDOI
An innovative method of teaching digital system design in an undergraduate electrical and computer engineering curriculum
TL;DR: This paper presents a project-based approach to teaching digital system design as opposed to the traditional method that uses conventional classroom lectures with short laboratory exercises and presents evidence that this project approach offers benefits such as increased student interest and better retention.