This invention relates to methods for treatment of semiconductor substrates and in particular a method of etching a trench in a semiconductor substrate in a reactor chamber using alternatively reactive ion etching and depositing a passivation layer by chemical vapour deposition, wherein one or more of the following parameters: gas flow rates, chamber pressure, plasma power, substrate bias, etch rate, deposition rate, cycle time and etching/deposition ratio vary with time.

Method of surface treatment of semiconductor substrates

A field-effect transistor includes a carrier transport layer made of nitride semiconductor, a gate electrode having first and second sidewall surfaces on first and second sides, respectively, an insulating film formed directly on the gate electrode to cover at least one of the first and second sidewall surfaces, first and second ohmic electrodes formed on the first and second sides, respectively, a passivation film including a first portion extending from the first ohmic electrode toward the gate electrode to cover a surface area between the first ohmic electrode and the gate electrode and a second portion extending from the second ohmic electrode toward the gate electrode to cover a surface area between the second ohmic electrode and the gate electrode, wherein the insulating film is in direct contact with at least the first and second passivation film portions, and has a composition different from that of the passivation film.

Field-effect transistor

There is disclosed a method and apparatus for etching a substrate. The method comprises the steps of etching a substrate or alternately etching and depositing a passivation layer. A bias frequency, which may be pulsed, may be applied to the substrate and may be at or below the ion plasma frequency.

A method and apparatus for etching a substrate

A silicon wafer having a low concentration of oxygen and a silicon wafer having a high concentration of oxygen are joined and polished to prescribed thicknesses to form a semiconductor substrate according to the present invention. A region formed of the wafer having a low concentration of oxygen is used as a region where an element is formed, and a region formed of the wafer having a high concentration of oxygen produces a gettering effect on metal impurities and defects. As a DZ layer having a low concentration of oxygen, a wafer manufactured by an MCZ method or a wafer manufactured by a CZ method is used after being heat-treated at high temperature to diffuse oxygen outward. In another example, a damage layer, a polycrystalline silicon layer, an amorphous silicon layer or the like is formed between a DZ layer and an IG layer.

Semiconductor substrate having a gettering layer

Trenching techniques for forming a channel partially through and a via completely through the insulating layer of a substrate are disclosed. With additional steps the channel can form an electrically conductive line, an electrode of an integrated capacitor, or an optical waveguide.

Trenching techniques for forming channels, vias and components in substrates

PURPOSE:To obtain a semiconductor device with improved high temperature characteristics by a method wherein when a groove is formed on the surface of a semiconductor substrate and a glass insulation layer is adhered to the inside of the groove and the edge of the aperture, zinc system glass is introduced as the glass and the glass layer is covered with a silicon nitride film and an electrode forming portion of the surface of the substrate is processed by surface treatment. CONSTITUTION:A groove 13 is formed on the surface of a semiconductor substrate 11 and an insulation material 14 made of Zn system glass is electrolytically adhered to a P-N junction 12 exposed in the inside wall of the groove 13 and to the circumference of the aperture. The material 14 is left on the SiO2 film 15 as small particles 16 but they will have no problem because they will be removed by the following selecting etching process. Then the substrate 11 is baked at the required temperature and the material 14 is turned to a glass layer 17 and an Si3N4 18 is formed on the film 15 and the glass layer 17. A photoresist film 19 is formed on the surface other than the region where the electrode is formed and the film 15, with small particles 16 adhered on it, is removed by etching.

Manufacture of semiconductor device

PROBLEM TO BE SOLVED: To form a Pt layer by a photolithographical technique while securing a good etching rate and a good accuracy. SOLUTION: Formed on a major surface of a silicon substrate 1 is a first metallic layer 2, on an upper surface of which a platinum(Pt) layer 3 is formed. Next formed on an upper surface of the Pt layer 3 is a mask for selective exposure of the Pt layer 3. The Pt layer 3 is then subjected on its exposed surface to an oxygen plasma process to form a PtO2 layer thereon. The mask is removed. Thereafter the substrate is subjected to an etching process with the use of aqua regia to remove the Pt layer 3 except for its area having the PtO2 layer formed thereon. A remaining Pt layer 3 is used as a mask to eliminate the first metallic layer 2.

Murayama Yoshiaki

Papers

Manufacture of semiconductor device

Fabrication of semiconductor device