The device (2) has an assembly plate (3), an idler roller (4) that is centered on a roller pin. The idler roller is mounted in a movable manner on the assembly plate with a degree of rotational freedom around a pivot axis (X6) that is eccentrically provided with regard to the roller pin. A blocking unit such as protuberance (98), is arranged for non-return blocking of idler roller from an active configuration towards an assembly configuration with regard to the plate. The blocking unit is arranged distinct from a locking unit (36). An independent claim is also included for an engine.

Tensioner device for e.g. belt, in internal combustion engine of car, has blocking unit for non-return blocking of idler roller from active to assembly configuration with regard to plate, where unit is arranged distinct from locking unit

PURPOSE:To shorten computing time by shortening the holding time of a divisor and a dividend by deriving in advance a first substantial partial predictive value by a second quotient predictive circuit. CONSTITUTION:When a divider D and a divided N are inputted successively, they are set to a divisor register 11 and a partial residue register 10, and also, supplied to the second quotient predictive circuit 20 and a partial quotient predictive value is derived. The circuit 20 is constituted in the same way as a partial quotient predictive circuit 14. At the time of starting an operation, a selecting circuit 21 selects the output of the circuit 20 by a START signal, and outputs the partial quotient predictive value to a partial quotient predictive register 22. Thereafter, a partial residue is derived by subtracting the output of a multiple generating circuit 12 from the value of the register 10 by an adding circuit 13, and returned to the register 10. The circuit 14 generates a partial quotient predictive value which becomes a control signal to the circuit 12 from the high-order (a) bit of a result of the circuit 13 and the high-order (b) bit of the register 11. The circuit 21 selects the output of the circuit 14 after a second cycle, therefore, the arithmetic operation is repeated thereby.

High cardinal number irreparable type dividing device

PURPOSE: To quickly convert a divisor at a low cost so as to make faster division possible by converting the divisor to a certain value within a prescribed selection range before the division and converting a dividend by the same rate. CONSTITUTION: An original divisor DR is sent to a carrier selection adder 60 and a multiplexer(MX) 62, the most significant bit number of the original divisor is inspected and whether or not the conversion of the divisor is required is decided. When the conversion is not required, '1' is impressed to the control terminal of the MX 62 and the original divisor is sent to a divider. When the original divisor is not present in a desired range, the output of the MX 62 becomes the output of the adder 60 and the output of the adder 60, that is the selection range, becomes 1.5-2.0. One of DR/4 and DR/2 is added to the MX 64 depending on the size of the original divisor DR and a conversion divisor TDR is formed. The conversion the same as the conversion performed to the divisor is also performed to the dividend.

Digital dividing method and divisor conversion means

PURPOSE:To realize a division circuit of a high radix with a simple hardware constitution and to attain high speed division, by obtaining a quotinent of a divisor and a dividend obtained from a divisor obtained newly and a partial residual, by one digit each from the upper-order digit sequentially. CONSTITUTION:The upper-order of a divisor (d) on an input line 20 is given to a reciprocal table 22. The (d) is set to a register 25, an output of the table 22, i.e., an approximate value of the reciprocal of the (d) is set to a register 26, the multiplication is executed by taking the content of the registers 25, 26 as dividend and divider respectively and the result is set to pipeline registers 39, 40. The upper-order bits of the registers 39, 40 are summed at a pre-addition circuit 41 to obtain an approximate value of a partial residual pj. A quotinent digit qi+1 is obtained from this approximate value at a quotinent digit generating circuit 42, the product between this value qj+1 and the content of the register 25 is calculated, and a new partial residual pj+1 is obtained from the content of the registers 39, 40 and the partial residual pj. This residual is set to the registers 39, 40 for the operation.

Nakamura Sadao

Papers

High radix division system