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Design Of Analog Cmos Integrated Circuits

This expanded and thoroughly revised edition of Thomas H. Lee's acclaimed guide to the design of gigahertz RF integrated circuits features a completely new chapter on the principles of wireless systems. The chapters on low-noise amplifiers, oscillators and phase noise have been significantly expanded as well. The chapter on architectures now contains several examples of complete chip designs that bring together all the various theoretical and practical elements involved in producing a prototype chip. First Edition Hb (1998): 0-521-63061-4 First Edition Pb (1998); 0-521-63922-0

The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES

In this paper, two-stages low noise amplifier (LNA) based on common-source with feedback topology was designed using ALGAN/GAN 0.25um high electron mobility transistor (HEMT) technology on silicon carbide (SiC) substrate. The LNA is designed to be employed for Global Navigation Satellite System (GNSS) Applications. The feedback circuit topology is used in the design to achieve a noise figure of 1 - 1.2 dB with a small signal gain of 33-34 dB. Post-Layout simulation results demonstrate that the input return loss is −11 to −14 dB and the output return loss is −16 to −18 dB across the entire frequency range of 1.5 GHz to 1.7 GHz. The LNA has an output P1 dB and OIP3 of 18 dBm and 28 dBm, respectively which illustrated high linear performance. The power consumption is 0.7 W using a voltage supply of 5.5 V. The total chip size is 2.6 mm x 2.2 mm including the pads.

High Gain 0.25 μm GaN HEMT Based MMIC LNA for GNSS Applications

Tittle: Design of Phase Lock Looop with a new VCO topology through of an active inductor Author: Erick Jesús Arenas Mendoza

Diseño de un phase locked loop con una nueva topología de VCO a través de un inductor activo

Low noise amplifier (LNA) is a ubiquitous Radio Frequency (RF) component employed in the global navigation satellite system (GNSS) front end receiver to amplify the degraded RF signals captured by the antenna to the desired level. GNSS LNA boosts the desired signal power by adding minimal noise and distortion to mitigate the impact of noise added by subsequential components of the RF receiver chain thereby improving the overall signal-to-noise ratio (SNR) and the overall performance of the system. This paper explores the various GNSS LNA topologies that improve the system's overall performance with minimum power consumption, low noise figure (NF), high gain, good input-output matching, stability, and linearity. The outcome of this research work would help to design a successful LNA for enhancing the performance of the GNSS receiver.

A Review on design of low noise amplifiers for global navigational satellite system

An ultra-low power fully-integrated frequency synthesizer was designed and implemented in 130 nm CMOS technology. Based on integer-N phase locked loop architecture, the frequency synthesizer operates from 13.8 to 61 MHz. Current consumption has been minimized by the use of a mix of analog and digital blocks and a prior planning of current distribution amongst each blocks. The measured phase noise is −89.6 dBc/Hz @ 500 kHz offset and the current consumption is 77μA from 1.2V supply at 32MHz output. The reference frequency of 1MHz is generated from an on-chip RC based oscillator whose output frequency varies by only ±0.025% when temperature varies between −10°C to 110°C.

An ultra-low power charge-pump PLL with high temperature stability in 130 nm CMOS

A low power wideband low noise amplifier (LNA) was designed and implemented in SiGe HBT technology. The measured noise figure is less than or equal to 1 dB in almost the entire L-band. The gain in the L-band is above 13 dB with a gain variation of 4 dB. Hence, it's useful for present as well as future GNSS applications. A single supply of +5V is used. The active current consumption is 5 mA for a collector to emitter voltage of 3V. The stability of the design was tested using various simulations prior to actual implementation which greatly helped in preventing oscillations in the circuit. It is found to be unconditionally stable in the frequency range of 40 MHz to 40 GHz. The design consists of simple matching and DC bias networks making it small in size and cost-effective.

Low power, highly stable and wideband LNA for GNSS applications in SiGe technology

Abstract This thesis work was performed at RUAG Space AB, Goteborg, Sweden. The aim of this thesis is to test the performance boundaries of SiGe based heterojunction bipolar transistor in designing a low noise amplifier meant for GNSS applications. After careful consideration of different alternatives for active components in SiGe HBT process, BFY640-04 from Infineon was selected as the active component for the design. Later, different topologies have been evaluated in Advanced Design System (ADS) software and finally a common emitter topology is selected considering cost-effectiveness, performance and simplicity. Apart from this, the functionality of a limiter component namely, GG-77015-01 from Microsemi has been tested by placing it in front of the LNA. The purpose of this is to know if it can prevent the LNA from high power levels and to study its overall effect on noise figure, gain and linearity. The prototypes were fabricated on a hardback PCB consisting of Roger Duroid 6002 substrate. The designed LNA has less than 1 dB (excluding limiter) noise figure, gain of 17-13 dB and input return loss of 6 dB. It is powered by a single positive supply of +5 V and has very low DC power consumption of 15 mW. Also, the noise figure is fairly low in the entire L-band apart from current GNSS bands, which provides possibility of this design to be useful in future GNSS applications too. (Less)

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Navneeta Deo

Papers

An ultra-low power charge-pump PLL with high temperature stability in 130 nm CMOS

Low power, highly stable and wideband LNA for GNSS applications in SiGe technology

Design and Test of an L-Band (GNSS) Low Noise Amplifier and Limiter