A cellular communications system comprising a space based system comprising a first set of cells, and a ground based system comprising a second set of cells. The space and ground systems can optionally function substantially autonomously, with each using spectrum from at least one predetermined frequency band.

Integrated or autonomous system and method of satellite-terrestrial frequency reuse using signal attenuation and/or blockage, dynamic assignment of frequencies and/or hysteresis

A system and method of operation for efficiently reusing and/or sharing at least a portion of the frequency spectrum between a first satellite spot beam and a second satellite spot beam, and/or an underlay terrestrial network associated with a second satellite spot beam. The spectrum is efficiently reused and/or shared between respective spot beams and/or associated underlay terrestrial systems in a manner minimizes interference between the respective satellite and terrestrial systems.

Coordinated satellite-terrestrial frequency reuse

Iterative decoder employing multiple external code error checks to lower the error floor and/or improve decoding performance. Data block redundancy, sometimes via a cyclic redundancy check (CRC) or Reed Solomon (RS) code, enables enhanced iterative decoding performance. Improved decoding performance is achieved during interim iterations before the final iteration. A correctly decoded CRC block, indicating a decoded segment is correct with a high degree of certainty, assigns a very high confidence level to the bits in this segment and is fed back to inner and/or outer decoders (with interleaving, when appropriate) for improved iterative decoding. High confidence bits may be scattered throughout inner decoded frames to influence other bit decisions in subsequent iterations. Turbo decoders typically operate relatively well at regions where the BER is high; the invention improves iterative decoder operation at lower BERs, lowering the ‘BER floor’ that is sometimes problematic with conventional turbo decoders.

Iterative decoder employing multiple external code error checks to lower the error floor

A feed assembly for a parabolic dish reflector is described. The feed assembly includes a waveguide cavity locatable at the focal point, or any other desired off-boresight location corresponding point, of the parabolic dish, at least one first radiating element optimized for operation at a first frequency band and provided on a top surface of the waveguide cavity, and a plurality of second radiating elements each optimized for operation at a second band of frequencies and provided on the top surface of the waveguide cavity.

Integrated waveguide cavity antenna and reflector dish

A disk drive is disclosed comprising a multiple-input sequence detector for detecting an estimated data sequence from a sequence of read signal sample values. The multiple-input sequence detector comprises a first iterative detector and a second iterative detector. An error correction code (ECC) decoder decodes the estimated data sequence into at least one decoded codeword comprising a plurality of bits which are used as reliability metrics for biasing at least one of the iterative detectors.

Disk drive comprising a multiple-input sequence detector selectively biased by bits of a decoded ECC codedword

The present invention provides a method and apparatus (400) for iteratively decoding data which has been encoded with contatenated codes. The apparatus (400) includes pipelined and cascaded decoder processors (406, 430 and 436) connected to a multiple block memory device (402), through a multiplexing and data control block (404). A data decision element (437) is provided for generating decoded output data. The method includes receiving encoded data (802) while data already received is processed iteratively by decoder processors in a pipelined fashion. Decoder processors are designated to perform particular iterations (810) of an iterative decoding process which are performed simultaneously. Each of said decoder processors processes a subset of a total number of decoding iterations. As a decoder processor completes processing its designated iteration on a block of data, the decoder processor outputs decoding information (808) to the decoding processor designated to perform the subsequent iteration. Upon completion of all iterations for a block of data, the method includes generating output (814) consisting of the decoded data block. The method provides that once processing is complete on a data block, the memory block is made available (816) for the storing of new encoded input data.

Pipelined architecture to decode parallel and serial concatenated codes

A method is disclosed for efficiently transmitting large numbers of data channels through a satellite (24). The method uses a block encoder (28) that encodes the data channels with a block code to produce an encoded uplink data stream. A modulator (30) modulates the encoded uplink data stream. A transmit antenna (32) then sends the resultant modulated uplink data stream (34) to the satellite (24). The satellite uses a satellite demodulator (48) and a switch (50) to produce an internal data stream consisting of selected data channels in the uplink data stream (34). The internal data stream is fed into a convolutional encoder (52). The output of the convolutional encoder (52) is connected to a satellite modulator (54). The satellite transmit antenna (56) then sends the resultant modulated downlink data stream (58) to a receiver.

High efficiency signaling with minimum spacecraft hardware

An antenna system that includes one or more antenna feed horns (30), where each feed horn (30) includes a plurality of micro-mechanical devices (38) positioned around the aperture (32) of the feed horn (30). The micro-mechanical devices (38) are linear motion devices that can be activated to extend a conductive surface (40) beyond the end of the feed horn (30). By selectively actuating groups of the micro-mechanical devices (38) to extend the conductive surfaces (40), the end of the feed horn (30) can be changed to provide different asymmetrical configurations, causing the beam direction to change accordingly. The micro-mechanical devices (38) can be any suitable mechanical device, such as MEMS devices or carbon nanotube artificial muscles.

Steerable offset reflector antenna

A method for reducing interference and increasing spectral efficiency in a frequency reuse pattern (600) is disclosed. The method includes the steps of generating n original communications beams (302-308) assigned to substantially non-overlapping frequency bands, with the original communications beams extending over a first set of predetermined bandwidths. The method also generates n shifted communications beams (402-408) shifted by an orthogonal frequency separation from the n original communications beams (302-308), with the n shifted communications beams (402-408) extending over a second set of predetermined bandwidths. The method projects the n original communications beams (302-308) and the n shifted communications beams (402-408) in a frequency reuse pattern (600) over a region of interest by alternating the n original communications beams (302-308) with the n shifted communications beams (402-408).

A method for reducing interference and increasing spectral efficiency

A communications system (100) is disclosed for processing at least one uplink channel contained in at least one uplink beam (112) transmitted to a satellite (106). The communications system (100) includes at least one user terminal (110) that extracts a system clock, a synchronization word, and timing correction information from a downlink beam transmitted by a satellite. The user terminal includes a timing controller (226) that aligns uplink channel transmissions by generating a system clock based on the downlink symbol clock, said synchronization word, and said timing correction information. The user terminal includes at least one spread-spectrum spreader (254) for encoding at least one uplink channel, and a transmitter connected to the spread-spectrum spreader (254) for transmitting said at least one uplink channel in an uplink beam (112). The system also includes a satellite (106) which generates the synchronization word, downlink symbol clock, and the timing correction information needed by the user terminal. The satellite also includes a wideband FFT processor (322) that extracts uplink channels from the uplink beam (112) in bulk, and a despreader (326) connected to the FFT processor (322) for simultaneously despreading user signals contained in said uplink channels.

Oliver W. Saunders

Papers

Pipelined architecture to decode parallel and serial concatenated codes

High efficiency signaling with minimum spacecraft hardware

Steerable offset reflector antenna

A method for reducing interference and increasing spectral efficiency

Bulk despreading of multiple independent CDMA sources