Multilevel converters have been under research and development for more than three decades and have found successful industrial application. However, this is still a technology under development, and many new contributions and new commercial topologies have been reported in the last few years. The aim of this paper is to group and review these recent contributions, in order to establish the current state of the art and trends of the technology, to provide readers with a comprehensive and insightful review of where multilevel converter technology stands and is heading. This paper first presents a brief overview of well-established multilevel converters strongly oriented to their current state in industrial applications to then center the discussion on the new converters that have made their way into the industry. In addition, new promising topologies are discussed. Recent advances made in modulation and control of multilevel converters are also addressed. A great part of this paper is devoted to show nontraditional applications powered by multilevel converters and how multilevel converters are becoming an enabling technology in many industrial sectors. Finally, some future trends and challenges in the further development of this technology are discussed to motivate future contributions that address open problems and explore new possibilities.

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Recent Advances and Industrial Applications of Multilevel Converters

This paper gives an overview of medium-voltage (MV) multilevel converters with a focus on achieving minimum harmonic distortion and high efficiency at low switching frequency operation. Increasing the power rating by minimizing switching frequency while still maintaining reasonable power quality is an important requirement and a persistent challenge for the industry. Existing solutions are discussed and analyzed based on their topologies, limitations, and control techniques. As a preferred option for future research and application, an inverter configuration based on three-level building blocks to generate five-level voltage waveforms is suggested. This paper shows that such an inverter may be operated at a very low switching frequency to achieve minimum on-state and dynamic device losses for highly efficient MV drive applications while maintaining low harmonic distortion.

Medium-Voltage Multilevel Converters—State of the Art, Challenges, and Requirements in Industrial Applications

This paper compares the many fault tolerant three-phase ac motor drive topologies that have been proposed to provide output capacity for the inverter faults of switch short or open-circuits, phase-leg short-circuits, and single-phase open-circuits. Also included is a review of the respective control methods for fault tolerant inverters including two-phase and unipolar control methods. The output voltage and current space in terms of dq components is identified for each topology and fault. These quantities are then used to normalize the power capacity of each system during a fault to a standard inverter during normal operation. A silicon overrating cost factor is adopted as a metric to compare the relative switching device costs of the topologies compared to a standard three-phase inverter.

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Fault tolerant three-phase AC motor drive topologies; a comparison of features, cost, and limitations

New cascaded multilevel inverter topology with minimum number of switches

Pulse-width modulated (PWM) inverters are known to generate common mode voltages which cause motor bearing currents in the induction motor drives. They also result in leakage currents which act as sources of conducted electromagnetic interference in the drive system. The common mode voltage generated by a conventional three-level inverter can be eliminated by switching only the voltage space vectors which do not produce the common mode voltage. This paper presents a PWM switching strategy to eliminate common mode voltage using the open-end winding configuration for the induction motor. The switching strategy presented in this paper, does not generate any alternating common mode voltages in the drive system and hence the electrostatic coupling of the common mode voltage, which results in the bearing currents and the leakage currents, is avoided. The proposed scheme is devoid of neutral point voltage fluctuations and does not require neutral point clamping diodes, when compared to the common mode elimination scheme based on the conventional three-level inverter topology. Also, the present scheme uses a single dc-link with half the voltage compared to the conventional three-level inverter based scheme.

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P. Guggenbach

Papers

Configurations of high-power voltage source inverter drives