High-voltage Al/sub 0.22/Ga/sub 0.78/N-GaN high-electron mobility transistors have been fabricated using multiple field plates over dielectric passivation layers. The device breakdown voltage was found to increase with the addition of the field plates. With two field plates, the device showed a breakdown voltage as high as 900 V. This technique is easy to apply, based on the standard planar transistor fabrication, and especially attractive for the power switching applications.

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High breakdown voltage AlGaN-GaN HEMTs achieved by multiple field plates

GaN high electron mobility transistors (HEMTs) were fabricated using an overlapping-gate technique in which the drain-side edge of the metal gate overlaps on a high breakdown and high dielectric constant dielectric. The overlapping structure reduces the electric field at the drain-side gate edge, thus increasing the breakdown of the device. A record-high three-terminal breakdown figure of 570 V was achieved on a HEMT with a gate-drain spacing of 13 /spl mu/m. The source-drain saturation current was 500 mA/mm and the extrinsic transconductance 150 mS/mm.

High breakdown GaN HEMT with overlapping gate structure

A theory that emphasizes the role of surface states in the operation of GaAs MESFETs and that is intended to tie together hitherto unconnected anomalies in device behavior is presented. Such undesirable effects are consistent with the DC and microwave characteristics of the FET being modified by charge exchange with surface states. Generally speaking, these states are relatively slow, having characteristics frequencies of typically 1 kHz, but they nevertheless affect the microwave scattering parameters of the FET through the distortion they introduce to the shape of the depletion region in the transistor under given bias conditions. It is argued that the FET structure behaves as natural 'probe' of surface states and so constitutes a useful analytic tool for studying states on a variety of unpassivated and passivated surfaces. >

Low-field low-frequency dispersion of transconductance in GaAs MESFETs with implications for other rate-dependent anomalies

A simple three-terminal technique for measuring the off-state breakdown voltage of FETs is presented. With the source grounded, current is injected into the drain of the on-state device. The gate is then ramped down to shut the device off. In this process, the drain-source voltage rises to a peak and then drops. This peak represents an unambiguous definition of three-terminal breakdown voltage. In the same scan, a measurement of the two-terminal gate-drain breakdown voltage is also obtained. The method offers potential for use in a manufacturing environment, as it is fully automatable. It also enables easy measurement of breakdown voltage in unstable and fragile devices. >

A new drain-current injection technique for the measurement of off-state breakdown voltage in FETs

Output resistance and transconductance of GaAs MESFETs have been observed to change significantly at very low frequencies. Extensive measurements of these characteristics as a function of device bias are reported. Direct measurements of the dispersive behavior between DC and 100 kHz and over a broad temperature range have been made on ion-implanted monolithic microwave IC (MMIC) devices. Conductance deep level transient spectroscopy (DLTS) and microwave S-parameter measurements have also been made to investigate this behavior. These measurements reveal that surface or channel-substrate interface traps in the material are most likely to be responsible for the observed behavior. A new equivalent-circuit model which accounts for many of the observed characteristics is developed. Unlike previously proposed equivalent circuits, the model does not rely on physically unrealistic circuit element values in order to obtain accurate performance predictions. The bias dependence of circuit element values is computed for one device. Effects not described by the model are also discussed. >

Frequency-dependent electrical characteristics of GaAs MESFETs

Two dimensional computer simulation of the GaAs MESFET in the presence of a uniform surface charge predicted initial gate-drain avalanche voltages at variance with experiment in two respects: (a) The dependence of initial avalanche voltage upon gate length was weak compared with that evident in practice. (b) The absolute values of voltage were smaller by a factor of typically 3 than those observed experimentally. Examination of the potential and charge distributions revealed, even at low gate-drain potentials, electric fields near the drain end of the gate of sufficient magnitude to cause field emission. Electrons emitted in a direction parallel to the GaAs surface may occupy states in the forbidden band, which would result in a dynamic excess of charge residing on the surface immediately adjacent to the drain end of the gate. Inclusion of this effect in the computer model resulted in a simulated device behavior which is now similar to that found in practice.

P.H. Ladbrooke

Papers

The role of the device surface in the high voltage behaviour of the GaAs MESFET