We introduce the notion of a Physical Random Function (PUF). We argue that a complex integrated circuit can be viewed as a silicon PUF and describe a technique to identify and authenticate individual integrated circuits (ICs).We describe several possible circuit realizations of different PUFs. These circuits have been implemented in commodity Field Programmable Gate Arrays (FPGAs). We present experiments which indicate that reliable authentication of individual FPGAs can be performed even in the presence of significant environmental variations.We describe how secure smart cards can be built, and also briefly describe how PUFs can be applied to licensing and certification applications.

/pdf/silicon-physical-random-functions-51a41txofo.pdf

Silicon physical random functions

ESD Phenomena and Test Methods The Physics of ESD Protection Circuit Elements Requirements and Synthesis of ESD Protection Circuits Design and Layout Requirements Analysis and Case Studies Modelling of ESD in Integrated Circuits Effects of Processing and Packaging.

ESD in silicon integrated circuits

This paper presents the development of a simulation model for high-voltage gallium nitride (GaN) high-electron-mobility transistors (HEMT) in a cascode structure. A method is proposed to accurately extract the device package parasitic inductance, which is of vital importance to better predict the high-frequency switching performance of the device. The simulation model is verified by a double-pulse tester, and the results match well both in terms of device switching waveform and switching energy. Based on the simulation model, an investigation of the package influence on the cascode GaN HEMT is presented, and several critical parasitic inductances are identified and verified. Finally, a detailed loss breakdown is made for a buck converter, including a comparison between hard switching and soft switching. The results indicate that the switching loss is a dominant part of the total loss under hard-switching conditions in megahertz high-frequency range and below 8~10 A operation current; therefore, soft switching is preferred to achieve high-frequency and high-efficiency operation of the high-voltage GaN HEMT.

Package Parasitic Inductance Extraction and Simulation Model Development for the High-Voltage Cascode GaN HEMT

Physico-chemical models of the ISFET (Ion-Sensitive Field-Effect Transistor) were developed by the authors in the past, as SPICE built-in models (BIOSPICE). This approach has some drawbacks, i.e., the need of availability of the program source, a deep knowledge of the code subroutines and structure, and the need of compiling the whole program when a new model has to be implemented or when modifications to the models have to be made. To overcome these drawbacks, a more general and user-friendly approach is presented. It consists of a behavioral macromodel that can be used in conjunction with the most commercial SPICE versions. The behavior of the proposed macromodel has been validated by comparing the results with those obtained by BIOSPICE physico-chemical models and experimental measurements. The proposed macromodel is shown to operate also under subthreshold conditions that can be considered as a promising operating mode for large multisensor ISFET-based integrated systems.

A behavioral macromodel of the ISFET in SPICE

From the Publisher:
This new book, written by Andre Vladimirescu, who was instrumental in the development of SPICE at the University of California Berkeley, introduces computer simulation of electrical and electronics circuits based on the SPICE standard. Relying on the functionality first supported in SPICE2 that is now supported in all SPICE programs, this text is addressed to all users of electrical simulation. The approach to learning circuit simulation is to interpret simulation results in relation to electrical engineering fundamentals; the book asks the student to solve most circuit examples by hand before verifying the results with SPICE. Addressed to both the SPICE novice and the experienced user, the first six chapters provide the relevant information on SPICE functionality for the analysis of linear as well as nonlinear circuits. Each of these chapters starts out with a linear example accessible to any new user of SPICE and proceeds with nonlinear transistor circuits. The latter part of the book goes into more detail on such issues as functional and hierarchical models, distortion analysis, basic algorithms in SPICE and related options parameters, and, how to direct SPICE to find a solution when it does not converge to a solution. The approach emphasizes that SPICE is not a substitute for knowledge of circuit operation but a complement. The SPICE Book is different from previously published books in the approach of solving circuit problems with a computer. The solution to most circuit examples is sketched out by hand first and followed by a SPICE verification. For more complex circuits it is not feasible to find the solution by hand but the approach stresses the need for the SPICE user to understand the results. Readers gain a better comprehension of SPICE thanks to the importance placed on the relation between EE fundamentals and computer simulation. The tutorial approach advances from the hand solution of a circuit to SPICE verification and simulation results interpret

The SPICE Book

From the Publisher:
With all the clarity and hands-on practicality of the best-selling first edition,this revised version explains the ins and outs of SPICE,plus gives new data on modeling advanced devices such as MESFETs,ISFETs,and thyristors. And because it's the only book that describes the models themselves,it helps readers gain maximum value from SPICE,rather than just telling them how to run the program. This guide is also distinctive in covering both MOS and FET models. Step by step,it takes the reader through the modeling process,providing complete information on a variety of semiconductor devices for designing specific circuit applications. These include: Pn junction and Schottky diodes; bipolar junction transistor (BJT); junction field effect transistor (JFET); metal oxide semiconductor transistor (MOST); metal semiconductor field effect transistor (MESFET); ion sensitive field effect transistor (ISFET); semiconductor controlled rectifier (SCR-thyristor).

/pdf/semiconductor-device-modeling-with-spice-2dwm076llh.pdf

Paolo Antognetti

Papers

Semiconductor Device Modeling with Spice