An object of the present invention is to decrease the resistance of a power supply line, to suppress a voltage drop in the power supply line, and to prevent defective display. A connection terminal portion includes a plurality of connection terminals. The plurality of connection terminals is provided with a plurality of connection pads which is part of the connection terminal. The plurality of connection pads includes a first connection pad and a second connection pad having a line width different from that of the first connection pad. Pitches between the plurality of connection pads are equal to each other.

Semiconductor device and display device

An insulated gate field effect transistor is constructed by first forming a non-single crystalline semiconductor layer or island on an insulating surface of a substrate. A gate insulating layer is then formed on the semiconductor layer. A gate electrode is formed on the gate insulating layer. An impurity is added to a portion of the semiconductor layer to form source and drain regions, and the semiconductor layer is irradiated with light through the gate insulating layer. In preferred embodiments, the substrate is maintained at a temperature less than 400° C. and the light have a wavelength of 250-600 nm.

Insulated gate field effect transistor and its manufacturing method

A flat, non-vacuum display panel using a lightmodulating layer of a voltage-dependent, optically active material of twisted nematic liquid crystals, X-Y matrix addressed by an array of coextensive, vacuum-deposited, interconnected thin film transistors which are scanned from the periphery of the flat panel by electronic shift registers. The panel is illuminated from the rear by white light, which passes a mosaic color filter for color television display. The invention hereindescribed was made in the course of or under a contract with the U.S. Air Force.

Liquid crystal image display panel with integrated addressing circuitry

A solid-state imaging apparatus includes an image pick-up section in which photosensitive devices are arranged in, e.g., a honeycomb G square lattice, RB full-checker pattern due to shifted pixels. Regions void of the photosensitive devices are assumed to be virtual photosensitive devices. A signal processing section generates data for the virtual photosensitive devices by using the data of surrounding photosensitive devices while attaching importance to accurate color reproduction and horizontal and/or vertical resolution. As a result, the number of pixel data are increased in a square lattice arrangement. Therefore, high quality image signals are readily achievable with a smaller number of photosensitive devices than conventional with a conventional apparatus. Interpolation can be executed with the high quality signals to the limit of resolution with an adequate circuit scale. The honeycomb arrangement guarantees the required size of the individual pixel and thereby the sensitivity of the entire apparatus while increasing yield on a production line. False colors particular to a single photosensitive portion can be reduced by, e.g., uniform interpolation. Particularly, when a digital camera is constructed by using an imaging apparatus including optics operable with a silver halide sensitive type of film, false colors can be reduced without resorting to an optical low pass filter.

Solid-state imaging apparatus and signal processing method for transforming image signals output from a honeycomb arrangement to high quality video signals

A configuration is provided to reduce variations in the width of the gate of a read-out transistor without increasing the surface area of a memory cell. To do this, a recess is provided in an inner corner of a gate electrode that is bent into an L-shape. The recess is located so as to face a rectangular portion of an active region of the memory cell.

Semiconductor memory device

Insulated gate field effect devices and electrical circuits employing such devices

A CCD imager in which charges are read from the imager in serial fashion in the row direction a group of adjacent rows at a time. The charge packets of one row of a group are interleaved or read concurrently with those of other rows of the group during read out. Vertical interlacing is obtained by grouping the rows in different ways during the respective odd and even fields of an interlaced frame. Colors may be sensed by employing color filters in a particular pattern at the respective integration sites of the array.

Line transfer CCD imagers

Color television receiver

The columns of a charge transfer imager are arranged in groups with N columns in each group, each column of a group receiving light through a different color filter. Upon the completion of the integration time, each line is shifted out of the imager 1/N'th of a line at a time, each N'th of a line representing a different color component of the image. The different parts of each line subsequently are read serially and concurrently to obtain the N color signal components of each resolution element of the imager.

Charge transfer color imagers

A sensor array having photosensitive elements formed as an integral part of each stage of a shift register chain. Each stage has charge storage means. The photosensitive elements are coupled to the charge storage means for discharging them as a function of externally applied photo signals and, consequently, developing charge deficits in said charge storage means. The shift register, in response to a clocking signal, transfers the charge deficits from one stage to the next along the chain producing a serial output signal at an output terminal.

Paul K Weimer

Papers

Insulated gate field effect devices and electrical circuits employing such devices

Line transfer CCD imagers

Color television receiver

Charge transfer color imagers

Bucket brigade scanning of sensor array