In this paper a reconfigurable FPGA implementation for the maximum power point tracking (MPPT) in photovoltaic systems (PV) is presented. The proposed MPPT controller is based on fuzzy logic and operates under variable irradiance and temperature conditions. The fuzzy controller is developed at first using matlab Simulink model. It includes the PV panel, boost converter and MPPT controller. The tested controller is implemented in VHDL. The pro- posed design has the advantage of high flexibility and re-configurability, while maintaining faster response than other hardware implementations. The design has also the advantage of low cost and power consumption. To validate the design, simulation comparison between the Matlab Simulink and VHDL results are provided. The VHDL controller is implemented and synthesized on Spartan 6 field programmable gate arrays FPGA. A graphical user interface GUI is implemented to help the system designer reconfigure the fuzzy controller.

Reconfigurable generic FPGA implementation of fuzzy logic controller for MPPT of PV systems

— A large numbers of fuzzy control applications with the physical systems require a real-time operation to interface high speed constraints; higher density programmable logic devices such as field programmable gate array (FPGA) can be used to integrate large amounts of logic in a single IC. This paper reviews the state of the art of FPGA with the focus on FPGA-based fuzzy logic controller. The paper starts with an overview of FPGA in order to get an idea about FPGA architecture, and followed by an explanation on the hardware implementation with both type analogue and digital implementation, a comparison between fuzzy and conventional controller also provided in this paper. A survey on fuzzy logic controller structure is highlighted in this article with the focus on FPGA-based design of fuzzy logic controller with different applications. Finally, we provided the simulation and experimental results form the literature and concluded the main differences between software-based systems with respect to FPGA-based systems, and the main features for FPGA technology and its real-time applications.

FPGA-Based Fuzzy Logic: Design and Applications – a Review

A pulse width modulation (PWM) frequency converter (100) converts an input PWM signal to an output PWM signal having a different frequency while maintaining a substantially equal duty ratio. The PWM frequency converter (100) samples the input PWM signal for a PWM cycle using a sampling clock (112). A filter module (108) filters the resulting set of one or more PWM parameters to compensate for noise introduced by potential clock mismatch, clock jitter, ambient variations, and other non-deterministic issues, thereby generating filtered PWM parameters. The sampling employed by the filter module compares a difference between the one or more current PWM parameters and previous (or historical) PWM parameters from an earlier sampled PWM cycle to a predetermined change threshold in determining a filtered set of one or more PWM parameters. The filtered set of one or more PWM parameters then is used to generate one or more corresponding PWM cycles of the output signal.

Pulse width modulation frequency conversion

FPGA based real-time implementation of fuzzy logic controller for maximum power point tracking of solar photovoltaic system

Fuzzy Logic Controller (FLC) systems have emerged as one of the most promising areas for Industrial Applications. The highly growth of fuzzy logic applications led to the need of finding efficient way to hardware implementation. Field Programmable Gate Array (FPGA) is the most important tool for hardware implementation due to low consumption of energy, high speed of operation and large capacity of data storage. In this paper, instead of an introduction to fuzzy logic control methodology, we have demonstrated the implementation of a FLC through the use of the Very high speed integrated circuits Hardware Description Language (VHDL) code. FLC is designed for an armature control DC motor speed control. VHDL has been used to develop FLC on FPGA. A Sugeno type FLC structure has been used to obtain the controller output. The controller algorithm developed synthesized, simulated and implemented on FPGA Spartan 3E xc3s500e-4fg320 board.

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Design and Implementation of Fuzzy Controller on FPGA

This paper describes the implementation for a basic fuzzy logic controller in Very High speed integrated-circuit Hardware-Description Language (VHDL). It is not intended as an introduction to fuzzy logic control methodology; instead, we try to demonstrate the implementation of a fuzzy logic controller through the use of the VHDL code. Use of the hardware description language (HDL) in the application is suitable for being implemented into an Application Specific Integrated Circuit (ASIC) and Field Programmable Gate Array (FPGA). The main advantages of using the HDL approach are rapid prototyping, and allowing usage of powerful synthesis tools such as Xilinx ISE, Synosys, Mentor Graphic, or Cadence to be targeted easily and efficiently.

/pdf/vhdl-implementation-for-a-fuzzy-logic-controller-56q92r4def.pdf

VHDL Implementation For a Fuzzy Logic Controller

A digital incremental encoder for generating an output signal indicative of an angular position, a direction of rotation, and a speed of rotation of a shaft. A counter receives a PWM signal indicative of the angular position of the shaft and a clock signal from an angular position sensor, and generates a multi-bit output. A latch latches the multi-bit output, a first bit and a second bit of which are used to generate the output signals that include the first bit. The first bit and the second bit may be XOR'd together to generate an XOR output included in the output signals. A direction of rotation may be derived from a quadrature phase relationship between the first bit and the XOR output. The angular position sensor may be an NCAPS or MT-NCAPS. A linear position sensor may be used instead of an angular position sensor to generate the PWM signal.

Pulse width modulation based digital incremental encoder

A digitally programmable pulse-width-modulation (PWM) converter changes a 0% to 100% duty cycle input signal to any desired start and stop duty cycle range; for example, 5% to 95%. This is achieved by the difference in start and stop duty cycles forming a ratio which determines a pair of clock frequencies for modifying the PWM signal to provide the new start and stop duty cycle parameters.

Digitally programmable pulse-width modulation (PWM) converter

PROBLEM TO BE SOLVED: To provide an incremental encoder having improved resolution per rotation, and having increased stability exceeding that of an optical incremental encoder. SOLUTION: This digital incremental encoder generates output signals for expressing an angle position, a rotational direction and a revolution speed of a shaft. A counter 106 receives a PWM signal expressing the output signal for expressing the angle position of the shaft and a clock signal from an angle position sensor 100, and generates a multibit output. A latch 108 latches the multibit output, a first bit and a second bit of the multibit output are used for generating an output signal, and the output signal includes the first bit. The rotational direction is drawn out from a quadrature phase relationship between the first bit and an XOR output. The angle position sensor may be an NCAPS or MP-NCAPS. A straight line position sensor may be used instead of the angle position sensor to generate the PWM signal. COPYRIGHT: (C)2006,JPO&NCIPI

Digital incremental encoder, digital incremental encoder system, and method of generating output signals for expressing angle position, rotational direction and revolution speed of shaft

A multi-turn pulse width modulation (PWM) generator for
generating a PWM output corresponding to multiple 360 degree
turns. A counter receives a reference signal, and counts a
number of cycles of the reference signal to generate a binary
output corresponding to the number of cycles counted. A
frequency divider receives a sensor output signal, and divides
the frequency of the sensor output signal by the number of turns
in the multiple turns to generate a frequency divided signal.
The sensor output signal has substantially the same frequency as
the reference signal, but can be offset in phase from the
reference signal. A demultiplexer receives the binary output,
and generates a plurality of turn indicator signals, each
corresponding to one of the multiple turns. A multiplexer
receives the turn indicator signals and a mechanical turn
indication signal, and selects one of the turn indicator signals
that corresponds to the mechanical turn indication signal. At
least one flip flop receives the selected one of the turn
indicator signals and the frequency divided signal, and generates
the PWM output using the selected one of the turn indicator
signals and the frequency divided signal. The multi-turn PWM
generator may be combined with a single-turn angular position
sensor to form a multi-turn angular position sensor.

Philip Vuong

Papers

VHDL Implementation For a Fuzzy Logic Controller

Pulse width modulation based digital incremental encoder

Digitally programmable pulse-width modulation (PWM) converter

Digital incremental encoder, digital incremental encoder system, and method of generating output signals for expressing angle position, rotational direction and revolution speed of shaft

Programmable, pulse width modulation circuit for a multi-turn non-contact angular position sensor