This work explores the data reuse properties of full-search block-matching (FSBM) for motion estimation (ME) and associated architecture designs, as well as memory bandwidth requirements. Memory bandwidth in high-quality video is a major bottleneck to designing an implementable architecture because of large frame size and search range. First, the memory bandwidth in ME is analyzed and the problem is solved by exploring data reuse. Four levels are defined according to the degree of data reuse for previous frame access. With the highest level of data reuse, one-access for frame pixels is achieved. A scheduling strategy is also applied to data reuse of the ME architecture designs and a seven-type classification system is developed that can accommodate most published ME architectures. This classification can simplify the work of designers in designing more cost-effective ME architectures, while simultaneously minimizing memory bandwidth. Finally, a FSBM architecture suitable for high quality HDTV video with a minimum memory bandwidth feature is proposed. Our architecture is able to achieve 100% hardware efficiency while preserving minimum I/O pin count, low local memory size, and bandwidth.

https://ir.nctu.edu.tw:443/bitstream/11536/29135/1/000173716500006.pdf

On the data reuse and memory bandwidth analysis for full-search block-matching VLSI architecture

Wireless Electronic Check Deposit Scanning and Cashing Machine (also known and referred to as WEDS) Web-based Online account cash Management computer application System (also known and referred to as OMS virtual/live teller)—collectively invented integrated as “WEDSOMS” System Method and Apparatus for Depositing and Cashing Ordinary paper and/or substitute checks and money orders online Wirelessly from home/office computer, laptop, Internet enabled mobile phone, pda (personal digital assistant) and/or any Internet enabled device WEDS enables verification and transmittal of image, OMS is the navigation tool used to set commands and process requests, integrated with WEDS, working collectively as WEDSOMS System

Wireless electronic check deposit scanning and cashing machine with web-based online account cash management computer application system

Digital video coding standards such as H.263 and MPEG are becoming more and more important for multimedia applications. Due to the huge amount of computations required, there are significant efforts to speed up the processing of video encoders. Previously, the efforts were mainly focused on the fast motion-estimation algorithm. However, as the motion-estimation algorithm becomes optimized, to speed up the video encoders further we also need to optimize other functions such as the discrete cosine transform (DCT) and inverse DCT (IDCT). In this paper, we propose a theoretical model for DCT coefficients. Based on the model, we develop an adaptive algorithm to reduce the computations of DCT, IDCT, quantization, and inverse quantization. We also present a fast DCT algorithm to speed up the calculations of DCT further when the quantization step size is large. We show, by simulations, that significant improvement in the processing speed can be achieved with negligible video-quality degradation, We also implement the algorithm in a real-time PC-based platform to show that it is effective and practical.

Modeling DCT coefficients for fast video encoding

Remote deposit of checks can be facilitated by a financial institution. A customer's general purpose computer and image capture device may be leveraged to capture an image of a check and deliver the image to financial institution electronics. Additional data for the transaction may be collected as necessary. The transaction can be automatically accomplished utilizing the images and data thus acquired.

Systems and methods for remote deposit of checks

The AUTOMATIC REMOTE DEPOSIT IMAGE PREPARATION APPARATUSES, METHODS AND SYSTEMS (hereinafter “MultiCrop”) transforms uploaded check images and check deposit information inputs via MultiCrop components image into deposit confirmation outputs. For example, in one embodiment, a user may employ a personal computer connected to a web camera, and/or a smartphone with a built-in camera to initiate the remote deposit by holding a check in front of the camera, and the MultiCrop may capture images of the check and send them to a financial institution for deposit processing.

Automatic remote deposit image preparation apparatuses, methods and systems

We discloses an efficient method for compressing a color image, visual block pattern truncation coding (VBPTC), in which the conventional block truncation coding (BTC) serves to encode an original image. This method defines the edge block according to human visual perception. If the difference between the two quantized values of BTC in a block is larger than a threshold which is defined by visual characteristics, the block will be identified as an edge block. In an edge block, the bitmap is adapted to compute block gradient orientation and to match the block pattern.

Methods for compressing and re-constructing a color image in a computer system

The paper describes a novel MPEG-2 audio decoder with a new modified scheme. In the techniques of intelligent data arrangement, the complexity of the multichannel decoding can be largely reduced. In the modified decoding scheme, the bottleneck computation module can be reduced to a quarter of the size of the original. Also, the major memory storage only requires half the size of the standard synthesis subband filterbank.

A Novel MPEG-2 Audio Decoder With Efficient Data Arrangement And Memory Configuration

An architecture for performing the two-dimensional discrete wavelet transform includes a transform module including a first stage and a second stage for decomposing an input image into four bands, and among the four bands, the band having the low frequency in both horizontal and vertical direction serves as the input image for next level decomposition operation; a multiplexer for selecting the band having the low frequency in both horizontal and vertical direction as the input image to feed into the transform module; and an optional memory module for storing the band having the lowest frequency in both horizontal and vertical direction. The polyphse decomposition technique is employed to the decimation filters of the first stage for segmenting the coefficients of the decimation filters of the first stage into an odd-numbered part and an even-numbered part, and the coefficient folding technique is employed to the decimation filters of the second stage such that every two coefficients of the decimation filters of the second stage share one set of a multiplier, an adder, and a register.

Architecture for performing two-dimensional discrete wavelet transform

In this paper, a video coding algorithm suitable for video conference application, and an investigation of a video conference system over a LAN are presented. The proposed video coding algorithm is called the region base hybrid coding algorithm. This method can perform foreground and background segmentation. This is based on the characteristic of an unchanged background on most of the video conference applications. This property can reduce both data rate and computation load. The proposed algorithm is verified on a video conference system over a LAN, and it can work successfully.

A multimedia video conference system: using region base hybrid coding

This paper describes the VLSI implementation with a two-dimensional (2-D) data-reuse architecture for a full-search block-matching algorithm. Based on a one-dimensional processing element (PE) array and two data-interlacing shift-register arrays, the proposed VLSI architecture can efficiently reuse data to decrease external memory accesses and save the pin counts. It also achieves 100% hardware utilization and a high throughput rate. In addition, the same chips can be cascaded for different block sizes, search ranges, and pixel rates.

Po-Cheng Wu

Papers

Methods for compressing and re-constructing a color image in a computer system

A Novel MPEG-2 Audio Decoder With Efficient Data Arrangement And Memory Configuration

Architecture for performing two-dimensional discrete wavelet transform

A multimedia video conference system: using region base hybrid coding

Vlsi Implementation Of The Motion Estimator With Two-dimensional Data-reuse