The various arguments for introducing optical interconnections to silicon CMOS chips are summarized, and the challenges for optical, optoelectronic, and integration technologies are discussed. Optics could solve many physical problems of interconnects, including precise clock distribution, system synchronization (allowing larger synchronous zones, both on-chip and between chips), bandwidth and density of long interconnections, and reduction of power dissipation. Optics may relieve a broad range of design problems, such as crosstalk, voltage isolation, wave reflection, impedence matching, and pin inductance. It may allow continued scaling of existing architectures and enable novel highly interconnected or high-bandwidth architectures. No physical breakthrough is required to implement dense optical interconnects to silicon chips, though substantial technological work remains. Cost is a significant barrier to practical introduction, though revolutionary approaches exist that might achieve economies of scale. An Appendix analyzes scaling of on-chop global electrical interconnects, including line inductance and the skin effect, both of which impose significant additional constraints on future interconnects.

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Rationale and challenges for optical interconnects to electronic chips

Technologies now exist for implementing dense surface-normal optical interconnections for silicon CMOS VLSI using hybrid integration techniques. The critical factors in determining the performance of the resulting photonic chip are the yield on the transceiver device arrays, the sensitivity and power dissipation of the receiver and transmitter circuits, and the total optical power budget available. The use of GaAs-AlGaAs multiple-quantum-well p-i-n diodes for on-chip detection and modulation is one effective means of implementing the optoelectronic transceivers. We discuss a potential roadmap for the scaling of this hybrid optoelectronic VLSI technology as CMOS linewidths shrink and the characteristics of the hybrid optoelectronic transceiver technology improve. An important general conclusion is that, unlike electrical interconnects, such dense optical interconnections directly to an electronic circuit will likely be able to scale in capacity to match the improved performance of future CMOS technology.

/pdf/scaling-optoelectronic-vlsi-circuits-into-the-21st-century-a-bi3r37y043.pdf

Scaling optoelectronic-VLSI circuits into the 21st century: a technology roadmap

Optoelectronic-VLSI (OE-VLSI) technology represents the intimate integration of photonic devices with silicon VLSI electronics. We review the motivations and status of emerging OE-VLSI technologies and examine the performance of OE-VLSI technology versus conventional wire-bonded OE packaging. The results suggest that OE-VLSI integration offers substantial power and speed improvements even when relatively small numbers of photonic devices are driven with commodity complementary metal-oxide-semiconductor logic technologies.

Optoelectronic-VLSI: photonics integrated with VLSI circuits

Planar optics is an approach to build integrated free-space optical systems on single substrates. Computer-aided design, lithographic fabrication, and micro-bonding techniques are used to package the optics in a compact way. This paper reviews recent work on planar optics. It discusses various aspects of the fabrication, the design, and the application of planar optics as an interconnection technology for optoelectronic computing and switching systems. >

Planar packaging of free-space optical interconnections

The challenges associated with the development of free-space optically interconnected electronics are discussed. These include finding an application for which optics offers an improved performance, developing optical transceivers, and developing suitable optics and mechanics. The main focus of the paper is the discussion of some novel approaches that smart pixels offer to increase alignment tolerance.

Challenges in optically interconnecting electronics

The design and performance of arrays of hybrid optoelectronic detector and modulator elements for use as optical input and output pads for chip- and board-level optical interconnects are discussed. The application of these interface arrays to specific VLSI circuits is discussed, illustrating the potential improvements in performance levels. This solder bond technique is capable of very accurate component positioning at points across the entire surface of the VLSI circuit, so that precise alignment to the optical pathways can be envisaged with optical signals taken from or delivered to any position on the chip. Measurements presented indicate that submicron positioning can be achieved. In particular, a fabrication-tolerant modulator design incorporating a chirped semiconductor mirror is reported. >

Optoelectronic component arrays for optical interconnection of circuits and subsystems

interconnection limitations experienced in very large, high complexity systems This technology will impact all levels ot the interconnection heirecy, in particular at the chip level where new interconnect and switching architectures become possible These aie however, longer term applications than for interconnection at board and module level Optical interconnection at the chip level requires efficient optoelectronic interface component arrays, capable of providing highly parallel optical input and output points from an integrated circuit Reflective optical modulator and detector arrays which are flip-chip bonded to silicon VLSI transmitter and

http://ieeexplore.ieee.org/iel5/5435104/5435105/05435185.pdf

R.C. Goodfellow

Papers

Optoelectronic component arrays for optical interconnection of circuits and subsystems

High Performance Hybrid Optoelectronic Terminal Components for Optical Interconnect