A Residual Time Stamp (RTS) technique provides a method and apparatus for recovering the timing signal of a constant bit rate input service signal at the destination node of a synchronous ATM telecommunication network. At the source node, a free-running P-bit counter counts cycles in a common network clock. At the end of every RTS period formed by N service clock cycles, the current count of the P-bit counter, defined as the RTS, is transmitted in the ATM adaptation layer. Since the absolute number of network clock cycles likely to fall within an RTS period will fall within a range determined by N, the frequencies of the network and service clocks, and the tolerance of the service clock, P is chosen so that the 2P possible counts, rather than representing the absolute number of network clock cycles an RTS period, provide sufficient information for unambiguously representing the number of network clock cycles within that predetermined range. At the destination node, a pulse signal is derived in which the periods are determined by the number of network clock cycles represented by the received RTSs. This pulse signal is then multiplied in frequency by N to recover the source node service clock.

Synchronous residual time stamp for timing recovery in a broadband network

A sychronous frequency encoding technique (SFET) provides method and apparatus for recovering the timing of an isochronous source node input service signal at the destination node of a synchronous ATM telecommunication network despite cell jitter which arises from the broadband multiplexing and switching delays in the network. A source node control clock is employed which is of greater frequency than that of the service signal and as a result a data under-flow condition occurs in the cell assembly process at a rate that is a function of the difference between such clock frequencies. Regular cell transmission is inhibited for a period at each under-flow occurrence and this pseudo-"stuffed cell" gap is signaled by setting a flag bit carried by an ensuing transmitted cell. At the destination node, a timing stream from the control clock, which is synchronous with that of the source node, is regularly gapped by inserting periods of delay according to the ratio of flagged cells in the service transmission, thereby reducing the timing stream by the noted frequency difference and reproducing the original service signal frequency.

Synchronous frequency encoding technique for clock timing recovery in a broadband network

The transparent transport of real-time periodic traffic through a broadband packet network requires the recovery of source clock frequency at the destination. The arriving packet stream at the destination buffer contains the source clock frequency information, which can be recovered by monitoring the buffer level, and using it to adjust the destination clock frequency without buffer under- or overflow. However, the inherently stochastic nature of packet transport in a broadband packet network makes the recovery difficult. The authors illustrate the packet jitter phenomenon, and develop algorithms to construct the destination clock frequency such that it asymptotically follows the source clock frequency with minimal variation. They provide a systematic design procedure for the implementation of these algorithms, and apply them to a computer model of a single stage FCFS multiplexer to demonstrate their effectiveness and different design trade-offs. They also discuss the application of the algorithms to the audio and video services. >

Jitter and clock recovery for periodic traffic in broadband packet networks

Considers the importance of circuit emulation for customer requirements and its continued value as the broadband network evolves from broadband access to an integrated network combining broadband access with broadband packet switching Next, the authors address two related issues, the effects of a circuit emulation requirement on packet network performance requirements and, given these requirements, the design of conforming packet networks They examine two performance requirements, those related to packet loss and those related to packet delay and jitter The requirement that the packet network preserve the timing integrity of the emulated circuit is translated into performance requirements that protect against packet loss It is shown that the packet loss due to buffer overflow or underflow should be better than 10/sup -10/ for any end-to-end connections Finally, the authors describe a two-stage time-space switch that could satisfy the performance constraints required for circuit emulation >

Emulating circuits in a broadband packet network

The transparent transport of real-time periodic traffic through a broadband packet network requires the recovery of source clock frequency at the destination. The inherently stochastic nature of packet transport in the network makes the recovery difficult. The authors illustrate the packet jitter phenomenon, describe several clock recovery algorithms, and provide a systematic design procedure for the implementation of these algorithms. They apply them to a computer model of a single-stage FCFS (first-come-first-serve) multiplexer to demonstrate their effectiveness and different design tradeoffs. The authors discuss the application of these schemes to audio and video services, as well as to digital circuit-switched traffic, e.g., DS1 and DS3. >

The authors illustrate the phenomenon of packet jitter using a simple example and propose methods by which the destination clock frequency can be adjusted, so that it follows the source clock frequency asymptotically while minimizing the effects of packet jitter on the outgoing packet stream. They provide a comprehensive asymptotic analysis of the estimation and control algorithms and discuss their implementation. The authors provide a systematic design procedure for choosing the relevant parameters for implementation and discuss the sensitivity of the performance with respect to these parameters. >

R.P. Singh

Papers

Adaptive clock synchronization schemes for real-time traffic in broadband packet networks