R
Raanan Sade
Researcher at Intel
Publications - 48
Citations - 292
Raanan Sade is an academic researcher from Intel. The author has contributed to research in topics: Matrix (mathematics) & Opcode. The author has an hindex of 8, co-authored 48 publications receiving 292 citations.
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Patent
Read and write monitoring attributes in transactional memory (TM) systems
TL;DR: In this paper, a method and apparatus for monitoring memory accesses in hardware to support transactional execution is described, which monitors accesses to data items without regard for detection at physical storage structure granularity, but rather ensuring monitoring at least at data items granularity.
Patent
Extending cache coherency protocols to support locally buffered data
TL;DR: In this article, the cache coherency state associated with cache lines to hold the data item are transitioned to a buffered state and a miss response is provided to ensure the transactionally updated data item is not made globally visible until commit.
Patent
Metaphysical address space for holding lossy metadata in hardware
TL;DR: In this paper, a method and apparatus for meta-address space for holding lossy metadata is described, where hardware modifies the data address to a metadata address including a metaphysical extension.
Patent
Memory corruption detection
TL;DR: In this article, a processing core is configured to validate a pointer referenced by a memory access instruction, by comparing a first value derived from a first portion of the pointer to a second value stored in the MCD table at an offset referenced by the pointer.
Patent
Recovery from multiple data errors
TL;DR: In this paper, a processing device may determine whether multiple data errors occur in memory locations that are within a range of memory locations and if the multiple memory locations are within the range of the memory locations, it may continue with a recovery process.