R
Rahul Sharangpani
Researcher at SanDisk
Publications - 56
Citations - 899
Rahul Sharangpani is an academic researcher from SanDisk. The author has contributed to research in topics: Layer (electronics) & Stack (abstract data type). The author has an hindex of 19, co-authored 56 publications receiving 899 citations.
Papers
More filters
Patent
Cobalt-containing conductive layers for control gate electrodes in a memory structure
Raghuveer S. Makala,Rahul Sharangpani,Sateesh Koka,Genta Mizuno,Naoki Takeguchi,Senaka Kanakamedala,George Matamis,Yao-Sheng Lee,Johann Alsmeier +8 more
TL;DR: In this article, a memory film and a semiconductor channel can be formed within each memory opening that extends through a stack including an alternating plurality of insulator layers and sacrificial material layers.
Patent
Method of selectively depositing floating gate material in a memory device
Marika Gunji-Yoneoka,Atusushi Suyama,Kensuke Yamaguchi,Hiroyuki Kinoshita,Raghuveer S. Makala,Rahul Sharangpani,Shigehisa Inoue,Tuan Pham +7 more
TL;DR: In this paper, a first material layer on a bevel and a back side of a substrate is selected such that a selective deposition process of a metal material provides a metal portion only on the second material layer.
Patent
Monolithic three-dimensional nand strings and methods of fabrication thereof
Raghuveer S. Makala,Yanli Zhang,Rahul Sharangpani,Yao-Sheng Lee,Senaka Kanakamedala,George Matamis,Johann Alsmeier +6 more
TL;DR: In this article, a vertically repeating stack of a unit layer stack is formed over a substrate, and a memory opening can be formed through the vertically repeated stack, and layer stack including a blocking dielectric layer, a memory material layer, an upper silicon oxide material layer and a semiconductor channel is formed in the memory opening.
Patent
Three-dimensional memory structure with multi-component contact via structure and method of making thereof
Somesh Peri,Sateesh Koka,Raghuveer S. Makala,Rahul Sharangpani,Matthias Baenninger,Jayavel Pachamuthu,Johann Alsmeier +6 more
TL;DR: In this article, a contact via structure can be formed by selective deposition of ruthenium on a semiconductor surface at the bottom of a contact trench, which can reduce contact resistance at the interface with an underlying doped semiconductor region.
Patent
Semiconductor structure with concave blocking dielectric sidewall and method of making thereof by isotropically etching the blocking dielectric layer
Sateesh Koka,Senaka Kanakamedala,Raghuveer S. Makala,Rahul Sharangpani,Yanli Zhang,Yao-Sheng Lee,George Matamis +6 more
TL;DR: In this article, a first blocking dielectric layer is formed in a memory opening through a stack of an alternating plurality of material layers and insulator layers, and a spacer with a bottom opening is formed over the first blocking layer by deposition of a conformal material layer and an anisotropic etch.