A network node, comprising a receiver configured to receive a request for a service, wherein the request comprises a hierarchically structured name comprising a root and a suffix, a data storage component comprising a network synchronized policy rule associated with a service name root, wherein the network synchronized policy rule is applied to any request for a service whose name comprises a root matching the service name root, and a processor coupled to the receiver and to the data storage component, wherein the processor is configured to apply the network synchronized policy rule to the request, wherein the processor is configured to synchronize service definitions and service policies with other nodes in a network based on the name of the service, and wherein the network synchronized policy rule is synchronized with the other nodes in the network using name-based routing.

Method and Apparatus for Policy Based Routing in Information Centric Networking Based Home Networks

Disclosed is a method for transmission and reception of a device-to-device (D2D) signal by a terminal in a wireless communication system. The method for transmission and reception of a D2D signal, according to an embodiment of the present invention, comprises the steps of: receiving a scheduling assignment comprising a resources pattern for transmission (RPT); and receiving a D2D signal in a subframe indicated in the RPT, wherein each bit of the RPT indicates whether or not the D2D signal is permitted to be transmitted in the subframe within a scheduling assignment period, and wherein, if the number of the subframes comprised in the scheduling assignment period is greater than the number of the bits of the RPT, at least one bit of the RPT indicates whether or not the D2D signal is permitted to be transmitted in two or more subframes.

Method and apparatus for transmitting and receiving signal for device-to-device terminal in wireless communication system

A system and method for threat detection and mitigation through run-time introspection. The system and method comprising receiving a request to monitor a computing environment. Based on the received request, the system and method further includes determining a set of introspection points for monitoring the computing environment. receive a request to monitor a computing environment, measuring at individual introspection points of the set of introspection points to obtain a set of measurements, generating a graph of a set of resources in the computing environment, wherein the graph correlates individual resources in the set of resources to other resources based on at based at least in part on the set of measurements, and determining whether to perform a security action based at least in part on whether an evaluation of the graph indicates a threat to the computing environment.

Threat detection and mitigation through run-time introspection and instrumentation

A solid state drive (SSD) apparatus including a plurality of solid state drives, a channel- interleaved interface operably coupled to the solid state drives, and a Peripheral Component Interconnect Express (PCIe) bridge operably coupled to the channel-interleaved interface.

Method and Apparatus for Scalable Low Latency Solid State Drive Interface

In an example, selected portions of an uncore fabric of a system-on-a-chip (SoC) or other embedded system is divided into two independent pipelines. Each pipeline operates independently of the other pipeline, and each accesses only one-half of the system memory, such as even or odd addresses in an interleaved memory. The two pipelines do not reconverge until after memory values have been returned. However, the uncore fabric may still present a single, monolithic interface to requesting devices. This allows system designers to treat the uncore fabric as a “black box” without modifying existing designs. Each incoming address may be processed by a deterministic hash, assigned to one of the pipelines, processed through memory, and then passed to a credit return.

Mitigating traffic steering inefficiencies in distributed uncore fabric

A hardware-based programmable deep learning processor (DLP) is proposed, wherein the DLP comprises with a plurality of accelerators dedicated for deep learning processing. Specifically, the DLP includes a plurality of tensor engines configured to perform operations for pattern recognition and classification based on a neural network. Each tensor engine includes one or more matrix multiplier (MatrixMul) engines each configured to perform a plurality of dense and/or sparse vector-matrix and matrix-matrix multiplication operations, one or more convolutional network (ConvNet) engines each configured to perform a plurality of efficient convolution operations on sparse or dense matrices, one or more vector floating point units (VectorFPUs) each configured to perform floating point vector operations, and a data engine configured to retrieve and store multi-dimensional data to both on-chip and external memories.

Systems and methods for deep learning processor

A packet classification system, apparatus, and corresponding apparatus are provided for enabling packet classification. A processor of a security appliance coupled to a network uses a classifier table having a plurality of rules, the plurality of rules having at least one field, to build a decision tree structure for packet classification. Duplication in the decision tree may be identified, producing a wider, shallower decision tree that may result in shorter search times with reduced memory requirements for storing the decision tree. A number of operations needed to identify duplication in the decision tree may be reduced, thereby increasing speed and efficiency of a compiler building the decision tree.

Duplication in decision trees

A packet processor provides for rule matching of packets in a network architecture. The packet processor includes a lookup cluster complex having a number of lookup engines and respective on-chip memory units. The on-chip memory stores rules for matching against packet data. A lookup front-end receives lookup requests from a host, and processes these lookup requests to generate key requests for forwarding to the lookup engines. As a result of the rule matching, the lookup engine returns a response message indicating whether a match is found. The lookup front-end further processes the response message and provides a corresponding response to the host.

Lookup front end packet input processor

Methods and apparatuses are disclosed for caching portions of a Deterministic Finite Automata (DFA) graph during a compilation stage prior to a run-time stage that identifies attack traffic based on the graph. Cacheable components are identified based on a traffic profile, a dictionary of keywords, and/or a geometrical configuration of the graph. Techniques are disclosed for performing various types of caching alone or in combination with other types. Caching based on a dictionary or profile exploit a tendency of graph traversals performed during non-attack scenarios to remain near root nodes that correspond to the start of patterns designating blacklist traffic. By caching nodes that are near root nodes and that are visited frequently during peacetime (non-attack) scenarios, significant cache hits may be achieved during run-time execution. Caching graph components while compiling patterns using presently disclosed techniques avoids the need for expensive hardware to learn what and when to cache.

Profile-based and dictionary based graph caching

In a processor of a security appliance, an input of a sequence of characters is walked through a finite automata graph generated for at least one given pattern. At a marked node of the finite automata graph, if a specific type of the at least one given pattern is matched at the marked node, the input sequence of characters is processed through a reverse non-deterministic finite automata (rNFA) graph generated for the specific type of the at least one given pattern by walking the input sequence of characters backwards through the rNFA beginning from an offset of the input sequence of characters associated with the marked node. Generating the rNFA for a given pattern includes inserting processing nodes for processing an input sequence of patterns to determine a match for the given pattern. In addition, the rNFA is generated from the given type of pattern.

Rajan Goyal

Papers

Systems and methods for deep learning processor

Duplication in decision trees

Lookup front end packet input processor

Profile-based and dictionary based graph caching

Reverse NFA Generation And Processing