A highly reliable computer memory storage system that is divided into subsystems, each of which is provided in triplicate: a primary subsystem, a backup subsystem and a spare subsystem. Upon detection of a non-recoverable failure in a primary subsystem, the backup subsystem substantially immediately assumes the tasks of the primary subsystem while the spare subsystem is integrated into the operation of the computer memory storage system. The triple replication of all subsystems and mechanisms for detecting failures in at least the primary and secondary subsystems provides an overall memory system which is highly reliable and substantially never requires servicing. In an alternative embodiment, three subsystems can share a load equally, for example a cooling or power supply load requirement. Upon failure, of any one or two of such three redundant subsystems, the remaining subsystems(s) is built with sufficient extra capacity that remaining subsystem(s) can still supply the total power or cooling requirements of the system.

Continuously available computer memory systems

A method and system is provided for programming the digital filter compensation coefficients of a digitally controlled switched mode power supply within a distributed power system. The distributed power system comprises a plurality of point-of-load (POL) regulators each comprising at least one power switch adapted to convey power to a load and a digital controller adapted to control operation of the power switch responsive to a feedback measurement. The digital controller further comprises a digital filter having a transfer function defined by plural filter coefficients. A serial data bus operatively connects each of the plurality of POL regulators. A system controller is connected to the serial data bus and is adapted to communicate digital data to the plurality of POL regulators via the serial data bus. The digital data includes programming data for programming the plural filter coefficients. The system controller further comprises a user interface adapted to receive the programming data therefrom.

Method and system for communicating filter compensation coefficients for a digital power control system

The power management system tracks the total amount of power drawn from a bus by devices connected to the bus and to the bus itself, based on the individual operational status of each device. The power manager system also tracks the total amount of power supplied to the bus. From this information the power manager system determines whether a power surplus exists sufficient to allow an additional device to operate or to allow a currently operating device to draw more power. Power usage requests received from devices connected to the bus are granted or denied by the power management system based on the determination of available power. The power management system additionally is capable of sequencing the use of several devices to allow the devices to each operate while maintaining the total power draw within an acceptable range. The system provides for efficient use of a limited amount of power to allow operation of more devices than conventionally allowed with a bus. The system also can activate power supply devices which are off-line via soft-power-on commands to increase the total amount of power available. The system is advantageously implemented with any bus system having devices drawing power from the bus from power supplies providing limited power.

Power management system for computer device interconnection bus

Method and apparatus for supplying power to devices coupled to a bus

A power control system comprises a plurality of POL regulators, at least one serial data bus operatively connecting the plurality of POL regulators, and a system controller connected to the serial data bus and adapted to send and receive digital data to and from the plurality of POL regulators. The serial data bus further comprises a first data bus carrying programming and control information between the system controller and the plurality of POL regulators. The serial data bus may also include a second data bus carrying fault management information between the system controller and the plurality of POL regulators. The power control may also include a front-end regulator providing an intermediate voltage to the plurality of POL regulators on an intermediate voltage bus.

Method and system for controlling and monitoring an array of point-of-load regulators

A power supply system for use in a fault-tolerant computer having a main bus interconnecting several main bus elements, with at least one of the elements being capable of transmitting commands and receiving status information. The system includes a status bus which is coupled to the main bus. A control unit is associated with each bus element, such control unit including a voltage regulator connected to a primary source of power for providing regulated voltage to the associated bus element in response to commands received over the status bus from the main bus. The primary power source preferably includes redundant power supplies which provide voltage which is distributed over a pair of redundant voltage buses. Apparatus for sensing when a main bus element has seized the main bus may be included so that the bus element can be commanded by way of the status bus to release the main bus.

Richard D. McMurray

Papers

Fault-tolerant power supply system