Showing papers by "Richard M. Fujimoto published in 1993"

Feature Article—Parallel Discrete Event Simulation: Will the Field Survive?

Abstract: Despite over a decade and a half of research and several successes, technologies to use parallel computers to speed up the execution of discrete event simulation programs have not had a significant impact in the general simulation community. Unless new inroads are made in reducing the effort and expertise required to develop efficient parallel simulation models, the field will continue to have limited application, and will remain a specialized technique used by only a handful of researchers. The future success, or failure, of the parallel discrete event simulation field hinges on the extent to which this problem can be addressed. Moreover, failure to meet this challenge will ultimately limit the effectiveness of discrete event simulation, in general, as a tool for analyzing and understanding large-scale systems. Basic underlying principles and techniques that are used in parallel discrete event simulation are briefly reviewed. Taking a retrospective look at the field, several successes and failures in uti...

Parallel and distributed discrete event simulation: algorithms and applications

Abstract: This tutorial reviews issues concerning the execution of discrete event simulation programs on multiprocessor and distributed computing platforms. The synchronization problem that has driven much of the research in this field is reviewed. Space-parallel and time-parallel approaches to concurrent execution are described. Experiences in applying these techniques to specific applications are examined. Finally, issues that must be considered to develop efficient concurrent simulation programs are discussed.

A performance study of the cancelback protocol for Time Warp

Abstract: This work presents results from an experimental evaluation of the space-time tradeoffs in Time Warp augmented with the cancelback protocol for memory management. An implementation of the cancelback protocol on Time Warp is described that executes on a shared memory multiprocessor, a 32 processor Kendall Square Research Machine (KSR1). The implementation supports canceling back more than one object when memory has been exhausted. The limited memory performance of the system is evaluated for three different workloads with varying degrees of symmetry. These workloads provide interesting stress cases for evaluating limited memory behavior. We, however, make certain simplifying assumptions (e.g., uniform memory requirement by all the events in the system) to keep the experiments tractable. The experiments are extensively monitored to determine the extent to which various overheads affect performance. It is observed that (i) depending on the available memory and asymmetry in the workload, canceling back several (called the salvage parameter) events at one time may improve performance significantly, by reducing certain overheads, (ii) a performance nearly equivalent to that with unlimited memory can be achieved with only a modest amount of memory depending on the degree of asymmetry in the workload.

Efficient implementation of event sets in Time Warp

Abstract: The implementation of the pending event set (PES) is crucial to the execution speed of discrete event simulation programs. This paper studies the implementation of the PES in the context of simulations executing on parallel computers using the Time Warp mechanism. We present a scheme for implementing Time Warsp's PES based on well-known data structures for priority queues. This scheme supports efficient management of future and past events, especially for rollback and fossil collection operations. A comparative study of several queue implementations is presented. Experiments with a Time Warp system executing on a Kendall Square Research multiprocessor (KSR1) demonstrate that the implementation of the input queue can have a dramatic impact on performance, as large as an order of magnitude, that is much greater than what can be accounted for by simply the reduced execution time to access the data structure. In particular, it is demonstrated that an efficient input queue implementation can also significantly reduce the number of rollbacks, and the efficiency of memory management policies such as Jefferson's cancelback protocol. In the context of this work we also present an improved version of the skew heap that allows dequeueing of arbitrary elements at low cost. In particular, the possibility of dequeueing arbitrary elements will improve memory utilization. This ability is also important in applications where frequent rescheduling may occur, as in ready queues used to select the next logical process to execute.

Parallel simulation of high-speed network multiplexers

Abstract: The simulation of statistical multiplexers in high-speed networks requires excessively long simulation runs when extremely small cell loss ratios are considered. We present an approach that allows the fast parallel simulation of finite capacity statistical multiplexers driven by bursty ON/OFF sources. Our approach is based on two techniques: (1) the derivation of cell level statistics from a burst level simulation; and (2) the use of time-parallel methods without fix-up phases for the burst level simulation. Both techniques contribute to the overall simulation speedup. The latter technique allows speedup factors that are linear with respect to the number of processors. An implementation of the method using 16 processors on a KSR 1 multiprocessor simulates from two million to over one billion cell arrivals per second, or up to five orders of magnitude faster than an efficient conventional sequential simulation. >

Time Warp simulation in time constrained systems

Abstract: The suitability of the Time Warp mechanism to perform simulations with real-time constraints is examined. A model for Time Warp is developed that accounts for overheads such as state saving, state restoration, and sending and transmitting positive and negative messages. A criterion called R-schedulability is defined to indicate whether or not computations can meet real-time deadlines. It is shown that if false events (events that will be rolled back or cancelled later) are generated, and there are no committed events with timestamps equal to those of the false events, Time Warp cannot meet the R-schedulability criterion. Further, if aggressive cancellation is used, scheduling guarantees still cannot be made even in the absence of such false events. However, Time Warp using lazy cancellation is shown to be R-schedulable provided such false events do not exist. Finally, based on these results, bounds on the execution time of a Time Warp simulation are derived.

Design and verification of the Rollback Chip using HOP: a case study of formal methods applied to hardware design

Abstract: The use of formal methods in hardware design improves the quality of designs in many ways: it promotes better understanding of the design; it permits systematic design refinement through the discovery of invariants; and it allows design verification (informal or formal). In this paper we illustrate the use of formal methods in the design of a custom hardware system called the “Rollback Chip” (RBC), conducted using a simple hardware design description language called “HOP”. An informal specification of the requirements of the RBC is first given, followed by a behavioral description of the RBC stating its desired behavior. The behavioral description is refined into progressively more efficient designs, terminating in a structural description. Key refinement steps are based on system invariants that are discovered during the design, and proved correct during design verification. The first step in design verification is to apply a program called PARCOMP to derive a behavioral description from the structural description of the RBC. The derived behavior is then compared against the desired behavior using equational verification techniques. This work demonstrates that formal methods can be fruitfully applied to a nontrivial hardware design. It also illustrates the particular advantages of our approach based on HOP and PARCOMP. Last, but not the least, it formally verifies the RBC mechanism itself.

Automatic parallelization of discrete event simulation programs

Abstract: Developing parallel discrete event simulation code is currently very time-consuming and requires a high level of expertise. Few tools, if any, exist to aid conversion of existing sequential simulation programs to efficient parallel code. Traditional approaches to automatic parallelization, as used in many parallelizing compilers, are not well-suited for this application because of the irregular, data dependent nature of discrete event simulation computations. In this paper, we present an approach for automatically parallelizing sequential discrete event simulation (DES) programs. A framework for parallel execution is developed into which sequential DES languages are mapped. Using a Time Warp like execution mechanism, we demonstrate that it is possible to automatically translate DES programs into equivalent parallel programs. A case study of the SIMSCRIPT II.5 language is conducted, and preliminary performance data based on a prototype parallelizing SIMSCRIPT compiler and run-time system are presented.

Rejoinder—Future Directions in Parallel Simulation Research

Abstract: The commentators provide many insightful and thought-provoking remarks regarding the parallel discrete event simulation (PDES) field, including important suggestions regarding future directions for PDES research. In the sections that follow, I will first discuss some general points raised by Reynolds regarding “alleviating performance concerns,” and then go on to discuss specific points regarding the approaches that were discussed in the feature article toward making parallel simulation technology more accessible to the simulation community. I will conclude with a few comments regarding additional “silver bullets” suggested by the commentators. INFORMS Journal on Computing, ISSN 1091-9856, was published as ORSA Journal on Computing from 1989 to 1995 under ISSN 0899-1499.