An electro-optical device having a plurality of pixels including a plurality of EL elements, wherein the electro-optical device provides a gray scale display by controlling a period of time at which the plurality of the EL elements emit light in one frame period; the plurality of the EL elements have a first electrode and a second electrode; the first electrode is held at a constant potential; and a potential of the second electrode changes in such a manner that a polarity of an EL driving voltage, which is a difference between the potentials applied to the first and second electrodes, is inverted for each one frame period.

Electro-optical device

An active matrix display device for suppressing voltage variation ΔV due to off-operation of a gate pulse, including TFTs and picture-element electrodes, at least one of the TFTs being assigned to each picture element, and each of the TFTs having a gate electrode connected to a gate line (first gate line), and a source and a drain one of which is connected to a data line, wherein a picture-element electrode concerned is formed so as to be overlapped with the first gate line through an insulator, and also so as to be overlapped through an insulator with a gate line other than the first gate line or a wiring disposed in parallel to the first gate line.

Electro-optical device and method of driving the same

A pixel includes a load, a transistor which controls a current supplied to the load, a storage capacitor, and first to fourth switches. By inputting a potential in accordance with a video signal into the pixel after the threshold voltage of the transistor is held in the storage capacitor, and holding a voltage of the sum of the threshold voltage and the potential, variations of a current value caused by variations of threshold voltage of a transistor can be suppressed. Consequently, a predetermined current can be supplied to the load such as a light-emitting element. Further, by changing the potential of a power supply line, a display device with a high duty ratio can be provided.

Semiconductor device, display device, and electronic device

The present invention is directed to perform fine low-voltage control without largely increasing the circuit layout area in a low-power consumption structure. In the case of shifting a region to a low-speed mode, a system controller outputs a request signal and an enable signal to a power switch controller and a low-power drive circuit, respectively, to turn off a power switch and to perform a control so that the voltage level of a virtual reference potential becomes about 0.2 V to about 0.3V. The region operates on voltages between a power supply voltage and a virtual reference potential, so that it is controlled in the low-speed mode.

Semiconductor Integrated Circuit Device

A semiconductor memory device comprises memory cells, a bitline connected to the memory cells, a read circuit including a precharge circuit, and a first transistor connected between the bitline and the read circuit, wherein a first voltage is applied to a gate of the first transistor when the precharge circuit precharges the bitline, and a second voltage which is different from the first voltage is applied to the gate of the first transistor when the read circuit senses a change in a voltage of the bitline.

Semiconductor memory device.

The gate insulator of an IGFET, whose gate is connected to the input terminal of a circuit, is protected by limiting the potential difference between any two circuit terminals. Each input and output terminal of the circuit is connected via protective diodes to the power supply lines of the circuit and a high conductivity, low reverse dynamic impedance, diode is connected between the power supply lines. The reverse voltage across the high conductivity diode is less than that of any other diodes at a given current level, whereby only the high conductivity diode conducts substantial currents in the reverse direction.

Protection circuitry for insulated-gate field-effect transistor (IGFET) circuits

An integrated circuit, formed on a common substrate, having one portion operated from a first source of operating potential and another portion operated from a second source of operating potential. Separate wells are diffused in said substrate for the connection thereto of the different voltages and a reference potential common to the two sources of operating potential is applied to the common substrate. Transistors having a given potential applied to their source electrodes are formed in the common substrate or in a well having the same given potential connected thereto for eliminating potential differences between the source and the substrate of the transistors.

System for eliminating substrate bias effect in field effect transistor circuits

Low resistance substrate contacts extending through the source region of an insulated gate field effect transistor (IGFET) will reduce parasitic bipolar effects in an integrated circuit. Such low resistance contacts may be made by diffusing impurities of a type opposite to the conductivity type of the source region through spaced areas of the source region thereby to provide low resistance paths between all points in the source and the underlying substrate. The low resistance contacts prevent large voltage drops in the substrate underlying the source thereby preventing "latch-up" of the parasitic devices formed during the manufacture of the integrated circuit.

Reduction of parasitic bipolar effects in integrated circuits employing insulated gate field effect transistors via the use of low resistance substrate contacts extending through source region

A network for initiating oscillations of a low power oscillator circuit at low operating voltages. The oscillator circuit includes an inverter with a quartz crystal connected between its input and output and with impedance means connected in series with the main conduction path of the inverter to reduce its power dissipation. The initiation network includes a switching means which is connected in parallel with the impedance means and which is responsive to the application of an operating potential to the oscillator circuit for momentarily providing a low impedance conduction path in parallel with the impedance means when an operating potential is applied to the circuit.

Starting circuit for low power oscillator circuit

AN INTEGRATED CIRCUIT HAVING A FIXED NUMBER OF ACTIVE AND PASSIVE SEMICONDUCTOR ELEMENTS FORMED IN A SUBSTRATE. THE ELEMENTS MAY BE INTERCONNECTED TO PROVIDE VARIOUS CIRCUIT FUNCTIONS, SUCH THAT ONE OR MORE ELEMENTS ARE NOT UTILIZED IN EACH DIFFERENT INTERCONNECTION ARRANGEMENT. THE AREA OVER THE ELEMENTS NOT UTILIZED IS EMPLOYED TO PROVIDE BONDING PADS OR CROSSOVER CONNECTIONS, THUS SAVING AREA ON THE SUBSTRATE SURFACE.

Robert Charles Heuner

Papers

Protection circuitry for insulated-gate field-effect transistor (IGFET) circuits

System for eliminating substrate bias effect in field effect transistor circuits

Reduction of parasitic bipolar effects in integrated circuits employing insulated gate field effect transistors via the use of low resistance substrate contacts extending through source region

Starting circuit for low power oscillator circuit

Integrated circuit having bonding pads over unused active area components