scispace - formally typeset
S

Sasa Misailovic

Researcher at University of Illinois at Urbana–Champaign

Publications -  69
Citations -  3383

Sasa Misailovic is an academic researcher from University of Illinois at Urbana–Champaign. The author has contributed to research in topics: Probabilistic logic & Benchmark (computing). The author has an hindex of 25, co-authored 69 publications receiving 2980 citations. Previous affiliations of Sasa Misailovic include University of Belgrade & National Center for Supercomputing Applications.

Papers
More filters
Proceedings ArticleDOI

Managing performance vs. accuracy trade-offs with loop perforation

TL;DR: The results indicate that, for a range of applications, this approach typically delivers performance increases of over a factor of two (and up to a factors of seven) while changing the result that the application produces by less than 10%.
Proceedings ArticleDOI

Dynamic knobs for responsive power-aware computing

TL;DR: The experimental results show that PowerDial can enable benchmark applications to execute responsively in the face of power caps that would otherwise significantly impair responsiveness, and can significantly reduce the number of machines required to service intermittent load spikes, enabling reductions in power and capital costs.
Proceedings ArticleDOI

Quality of service profiling

TL;DR: The experimental results from applying the implemented quality of service profiler to a challenging set of benchmark applications show that it can enable developers to identify promising optimization opportunities and deliver successful optimizations that substantially increase the performance with only smallquality of service losses.
Proceedings ArticleDOI

Verifying quantitative reliability for programs that execute on unreliable hardware

TL;DR: This work presents Rely a programming language that enables developers to reason about the quantitative reliability of an application -- namely, the probability that it produces the correct result when executed on unreliable hardware.
Journal ArticleDOI

Verifying quantitative reliability for programs that execute on unreliable hardware

TL;DR: A static quantitative reliability analysis is presented that verifies quantitative requirements on the reliability of an application, enabling a developer to perform sound and verified reliability engineering.