An intelligence system is provided that is comprised of the following basic components. First, a system for converting incoming unstructured data into a well described normalized form. Since the incoming data is multimedia and may represent some data type for which support is provided by the underlying OS platform, this normalized form includes the ability to fully describe and manipulate arbitrarily complex native or nonnative binary structures and collections. This support is preferably provided by a dedicated `mining' language tied intimately to a system ontology. In the preferred embodiment, such collections support the ability to attach arbitrary tags or annotations to the binary data they contain without in any way altering the binary representation itself. Additionally, the system supports the concept of either null or dirty (i.e., has been changed locally) datum.

A system and method for managing knowledge

The contactless IC card, the responding method, and the program that control the collision of response to the minimum, wherein the response judgment unit judges whether there is an initial response of the other contactless IC card at a specific time, and the response slot changing unit change the specific time based on the judgment result of the response judgment unit.

Contactless IC card, responding method, and program therefor

The method is for a random-based decision making process. A communication device (16) is activated and a menu (70) is displayed. In a selecting step (73) a random generating item (72, 74, 76, 78, 80, 82, 84, 92, 94, 81, 79, 100) is selected from the menu (70). The variables (21) are then defined and the variables may be provided with different weighing factors (36). A random generator (42) generates a random result (40) based on the weighed variables. The random result (40) is presented in the communication device (16). The presentation may be made at a random time, a specific time or right after the generation of the result.

Method for a random-based decision-making process

A physical noise source is used to develop a first sequence of random bits. A second sequence of random bits is formed from the first sequence by comparing the bits in each pair of bits of the first sequence. Every other bit of the second sequence is complemented to form a sequence of random numbers. The random numbers can be combined to form words.

Random number generator

A physical random number generator (10) has a bi-stable latch (40) that operates to latch a random number bit (RNB) in response to a reception of a voltage oscillating signal (VOS). When a switching device (20) is in a first operating state, the bi-stable latch (40) is deactivated and an oscillator (30) is activated to generate one or more unpredictable voltage oscillation signals (VOS), which may provoke the bi-stable latch (40) into a metastable state upon an activation of the bi-stable latch (40). When the switching device (20) is in a second operating state, the oscillator (30) is deactivated and the bi-stable latch (40) is activated to latch a random number bit (RNB) as a function of the unpredictable voltage oscillation signals (VOS), the randomness of the random number bit (RNB) being enhanced by any provoking of the bi-stable latch (40) into the metastable state by the voltage oscillating signal(s) (VOS).

Switching electronic circuit for random number generation

An RNG circuit is connected to the parallel port of a computer. The circuit includes a flat source of white noise and a CMOS amplifier circuit compensated in the high frequency range. A low-frequency cut-off is selected to maintain high band-width yet eliminate the 1/f amplifier noise tail. A CMOS comparator with a 10 nanosecond rise time converts the analog signal to a binary one. A shift register converts the serial signal to a 4-bit parallel one at a sample rate selected at the knee of the serial dependence curve. Two levels of XOR defect correction produce a BRS at 20 kHZ, which is converted to a 4-bit parallel word, latched and buffered. The entire circuit is powered from the data pins of the parallel port. A device driver interface in the computer operates the RNG. The randomness defects with various levels of correction and sample rates are calculated and the RNG is optimized before manufacture.

Scott A. Wilber

Papers

Random number generator and generation method