A system and method, including software implemented techniques, can be used to adjust for sag in stored data values. Charge is applied to multiple memory cells, and each memory cell is charged to a target voltage corresponding to a data value. The memory cells include a reference cell that is charged to a predetermined voltage. A voltage level in the reference cell is detected, and voltage levels from a group of memory cells are also detected. An adjustment is performed based upon the difference between the detected voltage level in the reference cell and the predetermined voltage.

Shifting Reference Values to Account for Voltage Sag

A system and method, including computer software, allows reading data from a flash memory cell. Voltages from a group of memory cells are detected. The group of memory cells have associated metadata for error detection, and each memory cell stores a voltage representing a data value selected from multiple possible data values. Each possible data value corresponds to one range of multiple non-overlapping ranges of analog voltages. Memory cells having uncertain data values are identified based on the detected voltages. Alternative data values for the memory cells having the uncertain data values are determined, and a combination of alternative data values is selected. An error detection test is performed using the metadata associated with the multiple memory cells and the selected combination of alternative data values.

Use of alternative value in cell detection

A system and method, including computer software, is used to write to a flash memory device that includes multiple memory cells. One or more of the memory cells are written at a first resolution corresponding to a first number of bits of data. A signal to write at a second resolution corresponding to a second number of bits of data is received. One or more of the memory cells are written at the second resolution.

Dynamic cell bit resolution

The invention relates to a high-pressure gas-discharge lamp, having at least one gastight fused press-seal (61, 62) between a glasslike material and molybdenum, wherein the molybdenum in the fused press-seal (61, 62) is at least partly exposed to an oxidizing environment and at least that part of the molybdenum (5) that is exposed to the oxidizing environment is covered with a coating, and the coating comprises at least one oxide from among Fethe invention relates to a high-pressure gas-discharge lamp,having at least one gastight fused press-seal between a glasslike material and molybdenum,wherein the molybdenum in the fused press-seal is at least partly exposed to an oxidizing environment and at least that part of the molybdenum that is exposed to the oxidizing environment is covered with a coating, and the coating comprises at least one oxide from among Fe2O3, Ta2O5, Nb2O5, Al2O3, SiO2, TiO2, ZrO2, HfO2, and/or one nitride from among TiN, ZrN, HfN, AlN, BN, and/or one carbide from among TiC, ZrC, HfC, VC, NbC, TaC, B4C.

High-pressure gas-discharge lamp

A system and method for storing data uses multiple flash memory dies. Each flash memory die includes multiple flash memory cells. A charge pump is adapted to supply charge at a predetermined voltage to each flash memory die of the flash memory dies, and an interface is adapted to receive instructions for controlling the charge pump.

Off-die charge pump that supplies multiple flash devices

A digitally compensated analog-to-digital converter (ADC) provides improved linearity by generating calibration values having higher resolution than the output signal generated during a normal conversion. During a calibration value generation operation, the converter performs a normal conversion, then performs an additional conversion, thereby generating a high resolution calibration value which is then rounded and stored in a memory device. The converter includes a flash ADC which converts an analog input signal received through a multiplexer and sample-hold amplifier to a digital signal. The flash ADC provides control signals to a multibit digital-to-analog converter which generates the analog reconfiguration signal during multi-stage conversions. A digital correction circuit receives the digital signals from several multi-stage conversion and generates a corrected signal. A digital calibration circuit stores the rounded calibration values during a calibration value generation operation and generates a digital calibration signal which is added to the corrected signal during a normal operation to generate a digitally compensated signal.

Analog-to-digital converter with digital compensation

A multiplexing parallel analog digital converter including two multiplexers, comparators, a demultiplexer, and a control unit. One multiplexer is provided the reference voltages resulting from a voltage division of inner resistors by a most significant bit reference ladder and a least significant bit reference ladder for the reference voltage of the next comparison. The other multiplexer is provided the reference voltages by accepting an analog input signal and the difference signal between an analog input signal and the output of a 4-bit digital analog converter. By using two multiplexers, only one analog digital converter is needed in this present device, so, the number of comparators is reduced. The multiplexer sends the digital signals compared with the most significant bit signal and the least significant bit signal, respectively, to a most significant output latch and a least significant output latch, respectively, so the 8-bit digital signal is obtained. The control unit is a logic circuit composed of flip-flops and gates, and provides clock signals for the sequential operation of the circuits, such as the operations of the multiplexers.

Multiplexing parallel analog-digital converter

A digitally compensated multi-bit sigma-delta analog-to-digital converter may be used to achieve high resolution in analog-to-digital conversions using a low oversampling ratio and simplified hardware construction. The digitally compensated multi-bit sigma-delta analog-to-digital converter has a recycling converter which converts an analog signal to a digital signal and which recycles the converted signal at least one time through a sample hold circuit, an analog-to-digital converter and a digital-to-analog converter in order to obtain a 4 bit digital signal. A digital corrector converts the 4 bit digital signal to a 16 bit corrected digital signal. The 16 bit corrected digital signal is used to generate a digitally compensated digital signal and to generate a digital error code. The digitally compensated digital signal is obtained by adding the 16 bit corrected digital signal with a 16 bit calibrated digital signal using an adder. The nine least significant bits of the compensated digital signal, representing a calibration value indicative of the error in the converted digital signal, are obtained using a roundoff circuit and stored in memory. As a result, high resolution in analog-to-digital conversion can be obtained while achieving a low oversampling ratio and simplified hardware construction.

Apparatus and methods for digitally compensated multi-bit sigma-delta analog-to-digital conversion

A metal halide lamp includes a luminous tube which is sealed and filled with predetermined rare gases and metal halide, a pair of electrodes provided in the inner portion near both ends of the luminous tube, an outer tube which encloses the luminous tube, and a pair of socket connectors electrically connected with the electrodes, wherein the luminous tube cross-section forms an uneven pattern and is pleated along outer and inner surfaces of the luminous tube. The atmospheric pressure in the luminous tube is stabilized to prevent the bending of the arc. Accordingly, the lifetime of the luminous tube is prolonged and high vapor density is obtained, thereby improving luminous efficiency and color rendering by far.

Metal halide lamp with pleated luminous tube envelope

A method for manufacturing a metal halide lamp is disclosed. According to the method, an internal lead wire of an arc tube can be electrically connected to an external lead wire for applying current thereto by sealing a surrounding case thereby omitting a process of welding a metal lamina affixed to the external lead wire to the internal lead wire of the arc tube. Thus, productivity can be enhanced and it is easy to handle and preserve components for manufacturing the metal halide lamp.

Seong-Ho Lee

Papers

Analog-to-digital converter with digital compensation

Multiplexing parallel analog-digital converter

Apparatus and methods for digitally compensated multi-bit sigma-delta analog-to-digital conversion

Metal halide lamp with pleated luminous tube envelope

Method for manufacturing metal halide lamp