A receiver for improving the performance of conventional Discrete Multitone Modulation (DMT) based Asymmetric Digital Subscriber Line (ADSL) modems, in the presence of noise and/or interference. A demodulator having an FFT followed by a single-tap-per-bin frequency-domain equalizer is augmented by an additional data-path utilizing windowing or pulse shaping. Windowing is done independently for each symbol over the orthogonality interval and efficiently in the time domain or frequency domain. A decision feedback equalizer at the output of the windowed data-path cancels inter-bin-interference created by windowing.

Receiver for discrete multitone modulated signals having window function

A method and apparatus are disclosed for efficiently bit-reversing and scrambling one or more bytes of payload data according to DSL standards on a processor. In one embodiment, this is achieved by providing an instruction for bit reversing and scrambling one or more bytes of data according to the DSL standards. Accordingly, the invention advantageously provides a processor with the ability to bit reverse and scramble data with a single instruction thus allowing for more efficient and faster scrambling operations for subsequent modulation and transmission.

System and method for bit-reversing and scrambling payload bytes in an asynchronous transfer mode cell

A method and apparatus are disclosed for efficiently de-scrambling one or more bytes of data according to DSL standards on a processor. This is achieved by providing an instruction for de-scrambling one or more bytes of data according to the DSL standards. Accordingly, the invention advantageously provides a processor with the ability to de-scramble data with a single instruction thus allowing for more efficient and faster de-scrambling operations for subsequent processing.

Data de-scrambler

A method and apparatus are disclosed for efficiently scrambling one or more bytes of data according to DSL standards on a processor. This is achieved by providing an instruction for scrambling one or more bytes of data according to the DSL standards. Accordingly, the invention advantageously provides a processor with the ability to scramble data with a single instruction thus allowing for more efficient and faster scrambling operations for subsequent modulation and transmission.

Single instruction for data scrambling

Multimedia service with audio and video have become most desirable as the ADSL technology ideally converted from 1.5 Mbps full duplex HDSL technology via two twist-pair into 6.144 Mbps transmission technology via single twist-pair. This results in an interactive transmission service of T1 & E1 class data using the subscriber line without repeaters. The ADSL transceiver chipset is configured by DMT (Discrete Multi Tone modulation) scheme and RISC-based DSP core structure. Our ADSL chip is to be used in VOD, interactive interact service and/or teleconferencing system, etc. The operating frequency and dissipated power of the chip are 40 MHz and 5 W at 5 V.

Seong-Jo Na

Papers

Design and implementation for 125 mW/MIPS ultra-high speed low power asymmetric digital subscriber line transceiver chip