Memristive frameworks or Memristors have obtained significant consideration due to the universality and high-speed performances, low- energy consumption to expedite data processing in real-time. This article consolidates the use of memristor for the implementation of digital logic gates, such as AND, OR and XOR. By employing memristor-based logic gates with reduced transistor counts, high-performance 8-bit Conditional Carry Adder (CCA) configuration is realized for low-power arithmetic systems. Memristor based 2x1 multiplexer is proposed utilizing Cadence Virtuoso environment of GPDK 90nm CMOS technology. In terms of power and energy-delay product, 54.64% - 96.56% and 78.37% - 99.71% improvement is observed by analyzing with the earlier reported works. By considering fixed 1V supply voltage, the power matrices for the configuration is achieved using Spectre simulation. Finally, a 16-bit CCA configuration is realized using 8-bit CCAs.

Low-Power High-Speed 8-bit Conditional Carry Adder (CCA) using Memristor Logic

Full adders are the building blocks of nearly all the VLSI applications—be it digital signal processing or image and video processing. In this paper, an 8-bit Carry Look-ahead Adder is implemented and compared using two different types of designs—a conventional Complementary Metal-Oxide Semiconductor (CMOS) logic and an Efficient Charge Recovery Logic (ECRL). These adders are designed and simulated using Tanner Tools v15.23 with 180 nm technology. Performance parameters like power consumption and propagation delay are compared by varying input supply and operating frequency for the two different circuits. The comparison shows that an 8-bit CLA design using ECRL Adiabatic logic is better than an 8-bit CLA design using CMOS logic in terms of power consumption, transistor count, and power delay product (PDP).

Shilpa Ameta

Papers

Design and Analysis of 8-Bit Carry Look-Ahead Adder Using CMOS and ECRL Technology