An optical disk having a diameter less than 140 mm and, a thickness of 1.2 mm±0.1 mm, with a plurality of record tracks having data recorded thereon as embossed pits representing information and exhibiting a track pitch in the range between 0.646 μm and 1.05 μm; with the tracks being divided into a lead-in area, a program area and a lead-out area. The data includes table of contents (TOC) information recorded in a plurality of sectors in at least one TOC track and user information recorded in a plurality of sectors in user tracks; with the TOC information including addresses of start sectors recorded in the user tracks. The data (both user and TOC information) is encoded in a long distance error correction code having at least eight parity symbols, and is run length limited (RLL) modulated.

Optical disk and method and apparatus for recording and then playing information back from that disk

A device for recording n-bit information words on a magnetic record carrier. A 1-bit digital word is affixed to each successive information word. The resulting (n+1)-bit information words are then encoded in an aT precoder into (n+1)-bit channel words (cW) which are recorded on the record carrier. The 1-bit digital words which are affixed are such that the running digital sum value of the output signal of the precoder has a desired pattern as a function of time. Consequently, for example, a pilot signal can be inserted into the channel word data stream which may be used to control tracking during reproduction of the recorded information from the record carrier. The values of a and n are such that a ≧2 and n≧1. Preferably, n<<1, for example, n≦10.

Device for recording a digital information signal on a record carrier

A method of converting n-bit information words into m-bit code words, and the other way round, is described. The code words have a limited disparity. For every information word two code words are assigned to a group of information words, which code words can be derived from one another by inversion. A choice between these two code words is made to limit the digital sum value so as to obtain a d.c. free code. In order to obtain a further limitation of the digital sum value within the code words these code words are derived from each other by inversion and reversal.

Method of transmitting information, encoding device for use in the method, and decoding device for use in the method

A digital modulation circuit which minimizes a DC component of an NRZI modulated code sequence while setting the T max and T W not to be varied. An m-n coding mode is determined for each data block composed of the predetermined number of m-bit datawords. That is, an m-n coding mode which minimizes the absolute value of the DSV is selected and the selected m-n coding mode is utilized for the m-n coding of the current data block. The code indicating the selected m-n coding mode is multiplexed to the m-n coded current block. An m--m mapping table is also determined for each data block. That is, such an m--m mapping table that minimizes the absolute value of the DSV is selected and the selected m--m mapping table is utilized for the m--m translation of the current data block. Then, the m--m mapped data block is m-n translated into a code block composed of the same number of n-bit codewords by utilizing the single m-n translation table.

Digital modulation circuit and digital demodulation circuit

A shift scan chain includes logic circuit blocks 11 - 18 and scan registers 21 - 28 connected at stages succeeding them. The shift chain is divided into divisional chains including the scan registers 21 - 24 and the scan registers 25 - 28. In the test operation mode of a semiconductor integrated circuit, test input data TI are supplied in synchronism with a multiplied clock signal CKD at a frequency twice of that of a clock signal CK. The test input data TI are converted by a serial/parallel conversion circuit 40 into parallel data S 41 and S 42, which are respectively supplied to the head scan registers 21 and 25 of the corresponding divisional chains. The length of each divisional chains becomes ½, and a test time period can be shortened.

Semiconductor integrated circuit with a test circuit

A method and apparatus are provided for encoding an n-bit information word into an m-bit code word, n≧2 and m>n, wherein the DC component of successive code words is minimized. The digital sum variation (DSV) of a plurality of preceding m-bit code words is used to determine which of, for example, two m-bit code words should be generated to represent the n-bit information word to be encoded. The m-bit code word whose disparity, when combined with the digital sum variation, reduces the digital sum variation towards zero is selected.

Method and apparatus for encoding a digital signal with a low DC component

Procede et appareil permettant de coder un signal numerique de facon qu'il presente une faible composante de courant continu, ainsi que de le decoder

PURPOSE:To enable self-locking by facilitating and securing magnetic recording and reproduction of digital VTR, etc., by outputting a code word with DSP (disparity), in the opposite code to that of DSV (digital sum variation) of the total of code words extracted as outputs. CONSTITUTION:When n-bit (n>=2) parallel information words are coded into m-bit (m>n) series code words, converting circuit 1 coordinates input information words D0-D3 one to one with code words and selects one information words, avoiding duplication, as a parallel code word of positive disparity DSP or negative DSP to be converted. The code word of circuit 1 is converted by converting circuit 2 into a series code word, which is outputted. In this case, calculating circuit 3, arithmetic circuit 5 and selecting circuit 4 find digital sum variation DSV at the end of the code word and select the next converted code word between the positive-DSP parallel code word and negative-DSP code word so that DSV including the code word to be converted will approximate zero.

Shimada Toshiyuki

Papers

Method and apparatus for encoding a digital signal with a low DC component

Procede et appareil permettant de coder un signal numerique de facon qu'il presente une faible composante de courant continu, ainsi que de le decoder

Encoder for binary signal

Verfahren und vorrichtung zum codieren eines digitalsignals mit niedriger gleichkomponente