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Shohei Yamada

Researcher at Sharp

Publications -  75
Citations -  2936

Shohei Yamada is an academic researcher from Sharp. The author has contributed to research in topics: Telecommunications link & User equipment. The author has an hindex of 34, co-authored 75 publications receiving 2936 citations.

Papers
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Patent

Prioritizing multiple channel state information (csi) reporting with carrier aggregation

TL;DR: In this paper, a method for reporting uplink control information (UCI) on a user equipment (UE) is described, where multiple channel state information (CSI) reports are generated for multiple component carriers (CCs) that are scheduled to be transmitted in a subframe.
Patent

Systems and methods for dual-connectivity operation

TL;DR: In this article, the UE determines if dual-connectivity is configured with more than one cell group and if a total scheduled transmission power of the cell groups exceeds a maximum allowed transmission power.
Patent

Devices for multi-group communications

TL;DR: In this article, a UE configured for multi-group communications is described, where the UE includes a processor and instructions stored in memory that is in electronic communication with the processor. But the UE also determines to use multiple groups of one or more cells, and further determines a primary secondary cell for a non-primary cell (non-PCell) group based on UE-specific radio resource control (RRC) signaling.
Patent

Devices for sending and receiving feedback information

TL;DR: In this paper, an evolved Node B (eNB) for sending feedback information is described, which includes a processor and instructions stored in memory that are in electronic communication with the processor, and determines configuration parameters related to an Enhanced Physical Hybrid-Automatic Repeat reQuest (ARQ) Indicator Channel (EPHICH).
Patent

Devices for reconfiguring uplink and downlink allocations

TL;DR: In this article, a user equipment (UE) for reconfiguring uplink and downlink (UL-DL) allocations is described, which includes a processor and instructions stored in memory that is in electronic communication with the processor.