A semiconductor switching element comprised by a high resistivity polycrystalline silicon resistor whose resistance irreversibly decreases to a small value at a threshold voltage upon the voltage across the resistor reaching the threshold voltage. A semiconductor memory device is constituted by using the switching element as a memory cell and a semiconductor gate element for controlling the current flowing through the semiconductor switching element.

Irreversible semiconductor switching element and semiconductor memory device utilizing the same

The specification discloses a low temperature process for depositing oxide layers on a substrate by photochemical vapor deposition, by exposing the substrate to a selected vapor phase reactant in the presence of photochemically generated neutral (un-ionized) oxygen atoms. The oxygen atoms react with the vapor phase reactant to form the desired oxide, which deposits as a layer on the substrate. The use of photochemically generated neutral oxygen atoms avoids damage to the substrate due to charge bombardment or radiation bombardment of the substrate. The deposited oxide layer may optionally incorporate a selected dopant material in order to modify the physical, electrical, or optical characteristics of the oxide layer.

Low temperature process for depositing oxide layers by photochemical vapor deposition

This application discloses a novel method to integrate thermal drop on demand ink jet devices and related pulse driver circuitry for chips used in thermal ink jet printers. This integrated printhead chip is made by first fabricating on the substrate the driver pulse circuitry through the last level of metallization. Once complete, a low temperature (<400 C.) CVD oxide is deposited and planarized. It is of sufficient thickness (3 to 4 microns) to insure a good thermal barrier between the pulse circuitry and the thermal inkjet devices. After planarization, the resistor material is deposited and patterned. Openings are then patterned to the inputs and outputs of the pulse driver circuitry. Aluminum copper metallurgy is deposited and patterned to connect the resistor to the pulse driver output and define the heater resistor areas. Inorganic and organic barrier layers are applied and patterned to protect the resistor material and interconnecting metallurgy from the corrosive effects of the ink. After testing, ink holes are drilled and the wafer is diced and nozzle plates are attached to the chips. Thus, this "on chip" driver integration enables the pulse driver circuitry to be moved to the thermal ink jet printhead. It offers advantages over other methods of ink jet/driver device integration by the chip footprint the same without decreasing the dimensions of the respective devices.

Thermal ink drop on demand devices on a single chip with vertical integration of driver device

An automatic gain control system and method, utilizing a digital logic attenuator and control in a communication receiver, operates linearly over a wide dynamic range in the amplitude of input signals applied to the receiver to eliminate distortion and frequency intermodulation products inherent in single channel and multi-channel frequency multiplex communication systems.

Communication system and method having wide dynamic range digital gain control

A MOSFET random access memory having an extremely low current load memory cell is disclosed. The memory cell comprises a cross-coupled binary stage in which one or more paths to ground can be selectively switched on or off through true and complement data nodes. Impedance means connect a power supply node to the data nodes for charging the data nodes to predetermined voltage levels. The impedance means comprise an intrinsic-extrinsic junction of a substantially pure, intrinsic semiconductor material and a diffusion of extrinsic conductivity impurities disposed within a region of the intrinsic semiconductor material. The impedance means is formed by an isoplanar silicon gate process as an integral portion of a polycrystalline silicon strip which interconnects the power supply node to a data node. A portion of the polycrystalline silicon strip is extended from the data node to form the gate of the transistor to which it is cross-coupled.

Extremely low current load device for integrated circuit

A thin film resistor is formed of polycrystalline silicon which contains 2 to 45 atomic percent of oxygen and wherein the resistivity of the polycrystalline silicon film varies as a function of the amount of oxygen contained in the film and wherein the resistivity is substantially higher than polycrystalline silicon not containing oxygen.

Thin film resistor

A control circuit for signal transmission which comprises a plurality of field effect transistors (which will be hereinafter referred to as simply FETs) with gates of high resistance is disclosed. In this case, the sources and drains of the FETs are connected commonly and connected in parallel to a signal transmission path, their gates are supplied with different voltages, and the mutual conductances among the FETs are selected to be reduced gradually.

Control circuit for signal transmission

An N-channel field-effect memory transistor using a metal alumina-oxide-semiconductor type structure has been developed. Memory is nonvolatile, electrically programmable, electrically alterable and nondestructively readout, and holds stored date indefinitely.

http://ieeexplore.ieee.org/iel6/8286/25918/01155053.pdf

Shuichi Sato

Papers

Thin film resistor

Control circuit for signal transmission

Nonvolatile, electrically-alterable MAOS memory