S
Surajit Das
Researcher at Indian Institute of Technology Guwahati
Publications - 3
Citations - 15
Surajit Das is an academic researcher from Indian Institute of Technology Guwahati. The author has contributed to research in topics: Network on a chip & Deadlock. The author has an hindex of 2, co-authored 3 publications receiving 7 citations.
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Journal ArticleDOI
Formal Modeling of Network-on-Chip Using CFSM and its Application in Detecting Deadlock
TL;DR: A formal modeling of a Network-on-Chip (NoC) using a communicating finite state machine (CFSM) is presented in this article and it is shown that this situation actually depicts cyclic dependencies among the different NoC components.
Book ChapterDOI
xMAS Based Accurate Modeling and Progress Verification of NoCs
TL;DR: This work has modeled NoC router using Executable Micro Architectural Specification (xMAS) primitives so that the design becomes near to register transfer level (RTL) and verified progress property with help of NuSMV model checker, showing that the model is scalable for progress verification in Mesh and Ring topologies.
Proceedings ArticleDOI
Tag only storage for capacity optimised last level cache in chip multiprocessors
TL;DR: This paper proposes to rectify the performance degradation by allowing more storage for the tag-only as well as tag+data parts by dynamically increasing the associativity of the sets.