Single-crystal silicon is being increasingly employed in a variety of new commercial products not because of its well-established electronic properties, but rather because of its excellent mechanical properties. In addition, recent trends in the engineering literature indicate a growing interest in the use of silicon as a mechanical material with the ultimate goal of developing a broad range of inexpensive, batch-fabricated, high-performance sensors and transducers which are easily interfaced with the rapidly proliferating microprocessor. This review describes the advantages of employing silicon as a mechanical material, the relevant mechanical characteristics of silicon, and the processing techniques which are specific to micromechanical structures. Finally, the potentials of this new technology are illustrated by numerous detailed examples from the literature. It is clear that silicon will continue to be aggressively exploited in a wide variety of mechanical applications complementary to its traditional role as an electronic material. Furthermore, these multidisciplinary uses of silicon will significantly alter the way we think about all types of miniature mechanical devices and components.

Silicon as a mechanical material

Shallow (<0.2 μm) n+ layers in Si with high conductivity (<40 Ω/⧠) have been formed by high‐dose (2×1016 cm−2) As implants. Experimental observations of As distributions and carrier concentrations are successfully simulated by a computer program which accounts for both the concentration dependent diffusion and As clustering effects. Reduction of electrical carriers in high‐dose As implanted Si during moderate temperature (∼800 ° C) heat treatments is readily explained by the kinetics of As clustering. Physical limitations on the conductivity which can be achieved by thermally annealed As implants in Si are also discussed.

Shallow junctions by high‐dose As implants in Si: experiments and modeling

Historical developments of the metal-oxide-semiconductor field-effect transistor (MOSFET) during the last 60 years are reviewed, from the 1928 patent disclosures of the field-effect conductivity modulation concept and the semiconductor triode structures proposed by Lilienfeld to the 1947 Shockley-originated efforts which led to the laboratory demonstration of the modern silicon. MOSFET in 1960. A survey is then made of the milestones of the past 30 years leading to the latest submicron silicon logic CMOS (complementary MOS) and BICMOS (bipolar-junction transistor CMOS combined) arrays and the three-dimensional and ferroelectric extensions of Dennard's one-transistor dynamic random access memory (DRAM) cell. The status of the submicron lithographic technologies is summarized. Future trends of memory cell density and logic gate speed are projected. Comparisons of the switching speed of the silicon MOSFET with that of silicon bipolar and GaAs field-effect transistors are reviewed. The use of high-temperature superconducting wires and GaAs-on-Si monolithic semiconductor optical clocks to break the interconnect-wiring delay barrier is discussed. >

Evolution of the MOS transistor-from conception to VLSI

A review of the theory, technology and applications of metal-semiconductor rectifiers☆

A fully‐ion‐implanted miniature 8192‐bit random‐access memory chip has been fabricated using electron‐beam lithography with minimum linewidth between 1 and 1.5 μm and advanced Si FET technology. Device structure, processing steps, mask transfer, and reactive ion etching processes capable of fabricating device structures in the micrometer and submicrometer dimensions are described. With a minimum linewidth of 1.25 μm, the memory chip occupies an area of 1.1×1.6 mm with an array density of 5 million bits/in.2 (0.8 million bits/cm2). A typical readout access time of 90 ns was measured on a functional chip.

T. H. P. Chang

Papers

Fabrication of a miniature 8K‐bit memory chip using electron‐beam exposure