After being the subject of speculation for many years, a software-defined radio receiver concept has emerged that is suitable for mobile handsets. A key step forward is the realization that in mobile handsets, it is enough to receive one channel with any bandwidth, situated in any band. Thus, the front-end can be tuned electronically. Taking a cue from a digital front-end, the receiver's flexible analog baseband samples the channel of interest at zero IF, and is followed by clock-programmable downsampling with embedded filtering. This gives a tunable selectivity that exceeds that of an RF prefilter, and a conversion rate that is low enough for A/D conversion at only milliwatts. The front-end consists of a wideband low noise amplifier and a mixer tunable by a wideband LO. A 90-nm CMOS prototype tunes 200 kHz to 20-MHz-wide channels located anywhere from 800 MHz to 6 GHz

The Path to the Software-Defined Radio Receiver

A digital channelized receiver is presented for the interception of a wide variety of signals of complex structure, including those with low probability of interception. The receiver is designed from the perspective of the time-frequency analysis. It uses an extended time-frequency representation based on the noncoherent integration of the short-time Fourier transform (STFT) on which the detection system and the encoder work. The encoder includes robust frequency estimation, automatic modulation recognition, and clustering, to handle broadband and simultaneous signals and to prevent out-of-channel detections (a typical phenomenon in channelized receivers). The receiver has been evaluated for a wide range of signals and shows a good performance in terms of detection, estimation, and processing of simultaneous signals. Signals collected from real-life systems and synthetic signals have been utilized.

Digital channelized receiver based on time-frequency analysis for signal interception

An efficient method is proposed for channelizing frequency division multiplexed (FDM) channels in wideband software radio (SWR) received signals that do not satisfy the conditions required for polyphase decomposition of the discrete filterbank (DFB) channelizer The proposed method, which uses modulated perfect reconstruction (PR) filterbanks, requires fewer computations than DFBs for channelizing wideband signals that are composed of FDM channels of nonequal bandwidths, especially when a large number of channels are extracted The proposed channelizer, if applied in the reverse direction, can be used to synthesize a set of channels with nonequal bandwidths into a single wideband signal in SWR transmitters A method is also proposed for efficiently designing the modulated PR filterbanks, which have a large number of subchannels and prototype filters with high stopband attenuations that are used in the proposed channelizer The computational complexity of the proposed channelizer is compared with the complexity of the DFB channelizer for channelizing the wideband and high-dynamic-range signals that are typical of SWR systems, and simulation results of the proposed channelization method are discussed

Efficient wideband channelizer for software radio systems using modulated PR filterbanks

This paper presents an in-depth study of the implementation and characterization of fast Fourier transform (FFT) pipelined architectures suitable for broadband digital channelized receivers. When implementing the FFT algorithm on field-programmable gate array (FPGA) platforms, the primary goal is to maximize throughput and minimize area. Feedback and feedforward architectures have been analyzed regarding key design parameters: radix, bitwidth, number of points and stage scaling. Moreover, a simplification of the FFT algorithm, the monobit FFT, has been implemented in order to achieve faster real time performance in broadband digital receivers. The influence of the hardware implementation on the performance of digital channelized receivers has been analyzed in depth, revealing interesting implementation trade-offs which should be taken into account when designing this kind of signal processing systems on FPGA platforms.

/pdf/implementing-fft-based-digital-channelized-receivers-on-fpga-34h2guzryn.pdf

Implementing FFT-based digital channelized receivers on FPGA platforms

This paper reports the impact of digital signal processing on microwave receiver technology. The majority of modern receiver designs are based on digital technology. Wide-and narrow-band receivers are presented. The wide-band receivers cover approximately 1-GHz instantaneous bandwidth and are used to intercept radar pulses. Current narrow-band receivers cover up to 50-MHz instantaneous bandwidth and are primarily used for receiving communication signals. Two approaches for wide-band receiver design are discussed. One is the conventional digital receiver. The other one is called the monobit receiver, which has slightly inferior performance in some respects, but can be built on a single chip. Narrow-band receivers are best implemented in software because they can more adapt to changes. Two types of receivers are discussed. One is the software Global Positioning System receiver. The other one is called a transform-domain communication system. The object of this system is to avoid interference in a hostile communication environment.

Digital microwave receiver technology

An approach is presented to realizing a digital channelized receiver for signal intercept applications that provides a hardware efficient implementation of a uniform filter bank in which the number of filters K is greater than the decimation factor M. The proposed architecture allows simple channel arbitration logic to be used and provides reliable instantaneous frequency measurements, even in adjacent channel crossover regions. In the proposed implementation of the filter bank, K is related to M by K=FM where F is an integer. It is shown that the optimum selection of F allows the instantaneous frequency measurement to be made in the channel crossover region and the arbitration function to be based solely on the instantaneous frequency measurement. The development of a filter bank structure which combines the flexibility of the short-time Fourier transform (STFT) with the implementation efficiency of the polyphase filter bank decomposition, meeting these requirements and leading to a hardware-efficient implementation, is presented.

T.W. Fields

Papers

A hardware-efficient, multirate, digital channelized receiver architecture