Takao Kato

TL;DR: In this paper, the authors propose a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, and a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.

TL;DR: In this paper, a switching system is disclosed in which a plurality of incoming highways are multiplexed in time division cells that have arrived are written into a buffer memory, the cells thus written are read in an appropriate order, separated in a multiplex way and distributed among incoming highways thereby to perform an exchange operation.

TL;DR: In this article, a voice signal converting device is adapted for a digital communication network which handles digitized voice signals and data signals simultaneously or equally, and a bit for discriminating whether a signal in communication is a voice or a data signal is applied in a digital signal channel.

TL;DR: In this paper, a packet switching system including at least one switching node or local unit each including a label conversion unit for accommodating a plurality of packet circuits and performing conversion into output port information of a switch based on a logic channel on a packet circuit, a self-routing switch for performing switching based on the output ports information, and a control unit for terminating a control packet and performing the call processing function is provided.

TL;DR: In this paper, a switching system for integratedly switching voice, data, image information and the like comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line.