Embodiments related to managing the process feed conditions for a semiconductor process module are provided. In one example, a gas channel plate for a semiconductor process module is provided. The example gas channel plate includes a heat exchange surface including a plurality of heat exchange structures separated from one another by intervening gaps. The example gas channel plate also includes a heat exchange fluid director plate support surface for supporting a heat exchange fluid director plate above the plurality of heat exchange structures so that at least a portion of the plurality of heat exchange structures are spaced from the heat exchange fluid director plate.

Process feed management for semiconductor substrate processing

A plasma processing apparatus wherein a layer structure consisting of plural layers formed in stack one upon another on a semiconductor wafer placed on the sample holder located in the process chamber, is etched with plasma generated in the process chamber by supplying high frequency power to the electrode disposed in the sample holder, the apparatus comprising a ring-shaped electrode disposed above the electrode and around the periphery of the top portion of the sample holder, an outer circumferential ring of dielectric material disposed above the ring-shaped electrode and opposite to the plasma, and a power source for supplying power at different values to the ring-shaped electrode depending on the sorts of layers of the layer structure.

Plasma Processing Apparatus

The present invention relates to a process and system for depositing a thin film onto a substrate. One aspect of the invention is depositing a thin film metal oxide layer using atomic layer deposition (ALD).

Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species

Embodiments related to hardware and methods for processing a semiconductor substrate are disclosed. One example film deposition reactor includes a process gas distributor including a plasma gas-feed inlet located to supply plasma gas to a plasma generation region within the film deposition reactor and a precursor gas-feed inlet located to supply film precursor gas downstream of the plasma generation region; an insulating confinement vessel configured to maintain a plasma generation region at a reduced pressure within the film deposition reactor and an inductively-coupled plasma (ICP) coil arranged around a portion of a sidewall of the insulating confinement vessel and positioned so that the sidewall separates the plasma generation region from the ICP coil; and a susceptor configured to support the semiconductor substrate so that a film deposition surface of the semiconductor substrate is exposed to a reaction region formed downstream of the process gas distributor.

Process gas management for an inductively-coupled plasma deposition reactor

A showerhead including a body having an opening, a first plate positioned within the opening and having a plurality of slots, a second plate positioned within the opening and having a plurality of slots, and wherein each of the first plate plurality of slots are concentrically aligned with the second plate plurality of slots.

Semiconductor reaction chamber showerhead

There is provided a semiconductor device manufacturing method for forming a step-shaped structure in a substrate by etching the substrate having thereon a multilayer film and a photoresist film on the multilayer film and serving as an etching mask. The multilayer film is formed by alternately layering a first film having a first permittivity and a second film having a second permittivity different from the first permittivity. The method includes a first process for plasma-etching the first film by using the photoresist film as a mask; a second process for exposing the photoresist film to hydrogen-containing plasma; a third process for trimming the photoresist film; and a fourth process for etching the second film by using the trimmed photoresist film and the plasma-etched first film as a mask. The step-shaped structure is formed in the multilayer film by repeatedly performing the first process to the fourth process in this sequence.

Semiconductor device manufacturing method and computer-readable storage medium

A plasma etching method is provided for etching a substrate corresponding to an etching object within an etching apparatus that includes a supply condition adjustment unit for adjusting a supply condition for supplying etching gas to the substrate, a temperature adjustment unit for adjusting a temperature of the substrate placed on a stage along a radial direction, and a plasma generating unit for generating plasma within a space between the supply condition adjustment unit and the stage. The plasma etching method includes a control step in which the temperature adjustment unit controls the temperature of the substrate to be uniform within a substrate plane of the substrate, and an adjustment step in which the supply condition adjustment unit adjusts a concentration distribution of active species contained in the plasma generated by the plasma generation unit within the space above the substrate.

Plasma etching method and semiconductor device manufacturing method

This paper introduces a new technique utilizing a direct current superimposed (DCS) capacitively-coupled plasma (CCP)
to enhance the etch selectivity to EUV resist with decreasing line width roughness (LWR). This new technique includes
chemical and e-beam curing effects. DCS CCP generates ballistic electrons, which reform the chemical structure of
photoresist. This surface modification hardens the photoresist (PR), and enhances the etch selectivity. The PR-hardening
technique also improves the tolerance towards stress by polymer. Hence, a polymer becomes applicable to protect
photoresist, and the etch selectivity increases even more. As a result, this cure can be processed without consuming the
thickness of EUV resist. The mechanism of EUV resist cure is discussed based on the surface analysis. In addition to the
basic physics of PR-hardening, this paper shows the benchmark results between DCS CCP and the conventional curing
techniques by RIE, such as HBr cure and H2 cure. Several new chemistries were applied to DCS CCP. In consequence,
the PR-hardening by DCS CCP achieved a 33% reduction in LWR at pre-etch treatment, and a 30% reduction during
under layer etch simultaneously maintaining enough thickness of EUV resist.

EUV resist curing technique for LWR reduction and etch selectivity enhancement

A plasma processing apparatus includes a first radio frequency (RF) power supply unit for applying a first RF power for generating a plasma from a processing gas to at least one of a first and a second electrode which are disposed facing each other in an evacuable processing chamber. The first RF power supply unit is controlled by a control unit so that a first phase at which the first RF power has a first amplitude for generating a plasma and a second phase at which the first RF power has a second amplitude for generating substantially no plasma are alternately repeated at predetermined intervals.

Plasma processing apparatus, plasma processing method and storage medium

A plasma etching method for plasma etching, in a processing chamber, an antireflection film laminated on an organic film formed on a substrate by using an etching mask made of a resist film formed on the antireflection film, the plasma etching method includes: depositing a Si-containing compound on the etching mask made of the resist film by using plasma of Si-containing gas in the processing chamber; and etching the antireflection film in a state where the Si-containing compound is deposited on the etching mask.

Takayuki Katsunuma

Papers

Semiconductor device manufacturing method and computer-readable storage medium

Plasma etching method and semiconductor device manufacturing method

EUV resist curing technique for LWR reduction and etch selectivity enhancement

Plasma processing apparatus, plasma processing method and storage medium

Plasma etching method and plasma processing apparatus