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Takehiko Nishida

Researcher at Mitsubishi Heavy Industries

Publications -  49
Citations -  703

Takehiko Nishida is an academic researcher from Mitsubishi Heavy Industries. The author has contributed to research in topics: Battery (electricity) & Battery pack. The author has an hindex of 17, co-authored 49 publications receiving 703 citations. Previous affiliations of Takehiko Nishida include Hitachi.

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Patent

Charge and discharge controller for storage apparatus, charge and discharge control method, and power storage system

TL;DR: In this paper, a controller sets and updates the discharge level of stopping the discharge of each condenser, according to the deterioration state or usage period of the condenser and performs discharge control of each storage apparatus, based on this discharge level.
Patent

Power storage device and hybrid distributed power system

TL;DR: In this article, a power storage device is equipped with a power conversion mechanism which performs the charge and discharge of an accumulator on the basis of the converter power command given from a controller.
Patent

Electric power storage system

TL;DR: In this paper, the authors proposed an electric power storage system which has in a case 6 an electric chamber 4 in which a power conversion device and a protection circuit are housed and a battery chamber 5 in which the plurality of modules of batteries housing at least one secondary battery in each case are housed.
Patent

System and method for electric power network management

TL;DR: In this paper, the authors proposed an electric power network management system where an electric network which is supplied with generated output from a plurality of natural energy generating sets (e.g., photovoltaic power generator, wind turbine generator) is stabilized.
Patent

Special purpose memory for graphics and display apparatus using the same

TL;DR: In this article, a three-dimensional graphic display apparatus for performing hidden surface removal and color blending is described, which includes a memory cell for holding RGB and window information about each pixel therein, an XY coordinate converter for converting XY coordinates of a pixel to a memory address, an intensity blending processor, and hidden-surface removal and window comparators, all of which are formed on the same chip.