An object is to provide a method for manufacturing a semiconductor device, in which the number of photolithography steps can be reduced, the manufacturing process can be simplified, and manufacturing can be performed with high yield at low cost A method for manufacturing a semiconductor device includes the following steps: forming a semiconductor film; irradiating a laser beam by passing the laser beam through a photomask including a shield for shielding the laser beam; subliming a region which has been irradiated with the laser beam through a region in which the shield is not formed in the photomask in the semiconductor film; forming an island-shaped semiconductor film in such a way that a region which is not irradiated with the laser beam is not sublimed because it is a region in which the shield is formed in the photomask; forming a first electrode which is one of a source electrode and a drain electrode and a second electrode which is the other one of the source electrode and the drain electrode; forming a gate insulating film; and forming a gate electrode over the gate insulating film

Method for Manufacturing Semiconductor Device

An RF switch circuit and method for switching RF signals that may be fabricated using common integrated circuit materials such as silicon, particularly using insulating substrate technologies. The RF switch includes switching and shunting transistor groupings to alternatively couple RF input signals to a common RF node, each controlled by a switching control voltage (SW) or its inverse (SW_), which are approximately symmetrical about ground. The transistor groupings each comprise one or more insulating gate FET transistors connected together in a “stacked” series channel configuration, which increases the breakdown voltage across the series connected transistors and improves RF switch compression. A fully integrated RF switch is described including control logic and a negative voltage generator with the RF switch elements. In one embodiment, the fully integrated RF switch includes an oscillator, a charge pump, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit.

Switch Circuit and Method of Switching Radio Frequency Signals

A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.

Through-wafer interconnects for photoimager and memory wafers

Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.

Packaged microelectronic imagers and methods of packaging microelectronic imagers

A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink

PURPOSE: To prevent the formation of a hardly removal decomposed layer on a contacting interface even when a through hole is formed by dry etching using fluoro-gas so that an excellent contact can be obtained by providing an easily removable metallic coating layer from which a decomposed layer can be easily removed by sputtering on the upper surface of a lower wiring layer composed mainly of aluminum. CONSTITUTION: A semiconductor device is provided with an aluminum-based lower wiring layer 15 overlaid by a metallic coating layer 15b, from which a decomposed layer formed by dry etching using a fluoro-gas can be easily removed, and an upper wiring layer 8 which is electrically connected to the wiring layer 15 through the through hole 7b of an interlayer insulating film 6. For example, an N-type active layer 2, source and drain areas 3 and 3, and ohmic source and drain electrodes 4 and 4 are formed on the surface side of a semi-insulating GaAs substrate 1. Then, after an alumina layer 15a is formed and a Ti layer 15b having a thickness of about 20-200Åis formed on the upper surface of the layer 15a, an FET is formed by forming a gate electrode 15 by patterning the layers 15a and 15b.

Semiconductor device and its manufacture

A semiconductor device having lead terminals bent in a J-shape is disclosed. A radiating plate having a recess formed on an outer peripheral portion thereof is exposed to a lower face of a resin member and free ends of outer portions of the lead terminals are positioned in the recess of the radiating plate. The free ends of the outer portions of the lead terminals and the recess of the radiating plate are isolated from each other by projections of the resin member. Since the radiating plate is exposed to the lower face of the resin member, the heat radiating property is high whereas the radiating plate and the lead terminals are not short-circuited to each other at all.

Semiconductor device having lead terminals bent in J-shape

A high frequency switching circuitry comprising the following elements At least one input signal terminal is provided into which an input signal is inputted An output signal terminal is also provided, from which an output signal is outputted A first resistive switching circuit is connected between the input signal terminal and a first node The first resistive switching circuit has first and second signal transmission channels having first and second resistances The second resistance of the second channel is much higher than the first resistance of the first channel The first resistive switching circuit switches the first and second signal transmission channels A first switching element is connected between the first node and the output terminal A second switching element is connected in series between the first node and a ground line It is important that the second resistance of the second signal transmission channel of the first resistive switching circuit is almost equal to a difference of an ON-resistance of the second switching element from an impedance of a signal source of the high frequency switching circuitry

High frequency switching circuit

A 3-element series parallel resonator, which performs series resonance and parallel resonance at a predetermined frequency by a combination of three elements including an inductor and a capacitor of concentrated constants, is used as a filter. This design can reduce the circuit constant and permits a filter to be formed on a semiconductor substrate. Accordingly, various micro-wave devices, such as an amplifier which requires a filter, a frequency converter, a multiplier and signal switcher, can be designed into an MMIC on a single chip.

Semiconductor device with a filter formed of 3-element series-and-parallel resonators

Disclosed is a semiconductor switch which has: a first resonance circuit which is composed so that a variable capacitance element and an inductor are in series connected and a series circuit composed of an inductor and a capacitor are in parallel connected to the variable capacitance element and the inductor, the first resonance circuit having one end connected to an input terminal and the other end connected to a first output terminal; a second resonance circuit which is composed like the first resonance circuit and is grounded to the first output terminal; a third resonance circuit which is composed like the first resonance circuit and is connected to the input terminal in parallel with the first resonance circuit, the third resonance circuit having a second output terminal on the reverse side of the input terminal; and a fourth resonance circuit which is composed like the first resonance circuit and is grounded to the second output terminal

Tatsuya Miya

Papers

Semiconductor device and its manufacture

Semiconductor device having lead terminals bent in J-shape

High frequency switching circuit

Semiconductor device with a filter formed of 3-element series-and-parallel resonators

Semiconductor switch having plural resonance circuits therewith