scispace - formally typeset
T

Tianshi Wang

Researcher at University of California, Berkeley

Publications -  30
Citations -  391

Tianshi Wang is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: Ising model & Injection locking. The author has an hindex of 10, co-authored 30 publications receiving 272 citations. Previous affiliations of Tianshi Wang include Tsinghua University & University of California.

Papers
More filters
Book ChapterDOI

OIM: Oscillator-Based Ising Machines for Solving Combinatorial Optimisation Problems

TL;DR: In this paper, the phase dynamics of coupled self-sustaining nonlinear oscillators are shown to be governed by a Lyapunov function that is closely related to the Ising Hamiltonian of the coupling graph.
Posted Content

Oscillator-based Ising Machine.

TL;DR: This work shows that Ising machines can be realized using almost any nonlinear self-sustaining oscillators with logic values encoded in their phases, and the feasibility of this scheme is demonstrated through several examples in simulation and hardware.
Proceedings ArticleDOI

New Computational Results and Hardware Prototypes for Oscillator-based Ising Machines

TL;DR: In this paper, the authors report new results on a novel Ising machine technology for solving combinatorial optimization problems using networks of coupled self-sustaining oscillators and demonstrate the effectiveness of oscillator-based Ising machines.
Posted Content

Well-Posed Models of Memristive Devices.

TL;DR: A collection of memristor models that may be dubbed "simulation-ready", i.e., that feature the right physical characteristics and are suitable for robust and consistent simulation in DC, AC, transient, etc., analyses are provided.
Book ChapterDOI

PHLOGON: PHase-based LOGic using Oscillatory Nano-systems

TL;DR: It is shown that with injection locking serving as the central mechanism, almost any DC-powered, self-sustaining nonlinear oscillator can be used to build fundamental components — including latches and combinatorial elements in a phase logic based computing architecture.