Automatic sorting and grouping of electronic mail items in an electronic mail system is provided. An automatic mail grouping property may be selected for electronic mail received, sent or stored in a variety of storage folders. For a given mail location (e.g., received mail, sent mail, or a given mail storage folder), a selected automatic grouping property causes mail to be displayed to a user in one or more categories that make location of specific mail items easier and more efficient. Visible dividers with optional headings may be provided between mail categories to quickly draw a user's attention to a given mail category and to separate large numbers of mail into logical groupings that make location of specific mail items more manageable.

Automatic Grouping of Electronic Mail

In a semiconductor integrated circuit device and a method of designing the same, design information about circuit cells each having a desired function are described as objects according to selected purposes. The pieces of design information are registered in a cell library as cell information capable of forming any of substrate potential fixed cells and substrate potential variable cells. Further, a data sheet common to the substrate potential fixed cell and the substrate potential variable cell is offered to a user, so that the user is able to make a selection according to the user's purposes. The substrate potential fixed cells and the substrate potential variable cells are mixed together on a semiconductor chip so as to be properly used according to the functions or the like of circuit portions in which the cells are used.

Method of designing semiconductor integrated circuit device and semiconductor integrated circuit device

The present invention is directed to perform fine low-voltage control without largely increasing the circuit layout area in a low-power consumption structure. In the case of shifting a region to a low-speed mode, a system controller outputs a request signal and an enable signal to a power switch controller and a low-power drive circuit, respectively, to turn off a power switch and to perform a control so that the voltage level of a virtual reference potential becomes about 0.2 V to about 0.3V. The region operates on voltages between a power supply voltage and a virtual reference potential, so that it is controlled in the low-speed mode.

Semiconductor Integrated Circuit Device

An improved user interface is provided for displaying selectable software functionality controls that are relevant to a selected object and that remain visibly available for use while the selected object is being edited. Upon selection of a particular object for editing, functionality available for editing the object is presented in a ribbon-shaped user interface above the software application workspace to allow the user ready and efficient access to functionality needed for editing the selected object. The display of relevant functionality controls is persisted until the user dismisses the display, selects another top-level functionality control or selects another object for editing.

User interface for displaying selectable software functionality controls that are relevant to a selected object

A search and find user interface is provided that is integrated with a data indexing engine to allow efficient and high-speed data search and retrieval across data storage folders associated with a given software module or associated with a number of disparate software modules. An expanded form of the search and find user interface is provided for advanced searching. Where searching is required beyond a present search scope, an automatic “upscoping” mechanism is provided for expanding a search to data storage folders outside a current data storage folder on which an initial search is executed.

Expanded search and find user interface

PROBLEM TO BE SOLVED: To verify a wiring route for connecting an analog circuit, a digital circuit and both the circuits in a hybrid semiconductor integrated circuit. SOLUTION: The hybrid semiconductor integrated circuit C0 for inputting an output signal of a digital circuit C1 to an analog circuit C2 comprises first selectors F0 to F7 for switching the signal of the circuit C1 and signals from external terminals TI0 to TI7 by a mode switching signal S0 to input it to the circuit C2, and a selector F8 for switching outputs of an analog signal processor D0 for constituting the circuit C2 and a P-s conversion block DS1 to output it to an exterior. Second external terminals TO0 to TO7 are connected to the output of the first selector. Thus, the wiring route for connecting the circuit C2 to the circuit C1 and the external terminal are selectively connected to verify an independent operation of both the circuits and the route.

Tominaga Masashi

Papers

Semiconductor integrated circuit