For the first time, we have successfully demonstrated the feasibility of integrating a high-permittivity (/spl kappa/) gate dielectric material zirconium oxide into the MOS capacitors fabricated on pure germanium substrates. The entire fabrication process was essentially performed at room temperature with the exception of a 410/spl deg/C forming gas anneal. After processing steps intended to remove the germanium native oxide interlayer between the zirconium oxide dielectric and germanium substrate, an excellent capacitance-based equivalent SiO/sub 2/ thickness (EOT) on the order of 5-8 /spl Aring/ and capacitance-voltage (C-V) characteristics with hysteresis of 16 mV have been achieved. Additionally, excellent device yield and uniformity were possible using this low thermal budget process.

Germanium MOS capacitors incorporating ultrathin high-/spl kappa/ gate dielectric

Publisher Summary This chapter discusses the flicker noise in electronic devices. The name “flicker noise” refers to the noise phenomena with a spectrum of the form AIβ/ƒɣ, here A is a constant, I is the current, ƒ is the frequency, and the exponents β and γ are also constants. The exponent β often has a value of about 2, though deviations are not uncommon. The theory of flicker noise as suppressed emission fluctuations cannot be valid, for in that case R, would be independent of d. Flicker partition noise indicates that the rate at which the current divides between the positive electrodes is randomly modulated by a I/ƒ-type process. The noise is due to fluctuations in the surface recombination velocity s and that there is direct experimental evidence in favor of it.

Flicker Noise in Electronic Devices

Passivation of Ge has been a critical issue for Ge MOS applications in future technology nodes. In this letter, we introduce ozone oxidation to engineer Ge/insulator interface. Density of interface states (Dit) across the bandgap and close to the conduction band edge was extracted using conductance technique at low temperatures. Dit dependence on growth conditions was studied. Minimum Dit of 3 times 1011 cm-2V-1 was demonstrated. Physical quality of the interface was investigated through Ge 3d spectra measurements. We found that the interface and Dit are strongly affected by the distribution of oxidation states and the quality of the suboxide.

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Ge-Interface Engineering With Ozone Oxidation for Low Interface-State Density

In this paper, nanoscale germanium (Ge) oxynitride dielectrics are investigated for Ge MOS device applications. The synthesizing methodology and physical properties of these oxynitride films have been examined first. Basic electrical characteristics have been acquired on metal-gated MOS capacitors with Ge oxynitride dielectric on substrates with different dopant types and crystal orientations. Using an optimized oxidation and nitridation recipe, high-quality Ge MOS capacitors with a minimal frequency dispersion and capacitance-voltage hysteresis have been demonstrated. In addition, the Ge oxynitride dielectric-substrate interface has also been analyzed with the combined low-frequency-high-frequency capacitance method that revealed a substantial reduction of interface trap density after the forming gas anneal. An asymmetric interface trap density distribution within the Ge bandgap has been mapped out, which might explain the inferior n-channel Ge MOSFETs with oxynitride dielectric. An abnormality in the general gate leakage behavior has been observed and found to originate from a transient charge-trapping effect

Nanoscale germanium MOS Dielectrics-part I: germanium oxynitrides

In this paper, we demonstrate high-mobility bulk Ge N- and P-FETs with GeON gate dielectric. The highest electron mobility to date in Ge is reported, and two times improvement over universal hole mobility is achieved for Ge P-FETs. For the first time, the effect of surface orientation on Ge mobility is investigated experimentally. A 50% improvement in electron mobility is shown for the (111) substrate orientation compared to the (100) orientation. Carrier scattering mechanisms are studied through low-temperature mobility measurements and interface characterization. The conductance technique is applied at low temperatures for complete mapping of the density of interface traps (Dit) across the Ge bandgap and also close to the band edges. Carrier scattering mechanisms and the distribution of Dit are compared for Ge NMOS and PMOS.

Ge (100) and (111) N- and P-FETs With High Mobility and Low- $T$ Mobility Characterization

The interface properties of Al2O3-Ge structure formed on germanium wafers by DC reactive sputtering are evaluated. The fast interface states are diminished by subjecting the sample to heat treatment in an inert gas flow. The interface state density is estimated to be typically less than 4×1011 state/cm2-eV from the shift of the flat-band voltage with temperature as originally adopted by Gray and Brown. From the measurement of the parallel conductance of the MOS structure, the electron capture cross section of the trap located at the interface is estimated to be about 0.9×10-17 cm2 using the tunnelling model of Preier, and about 1×10-18 cm2 using the surface potential fluctuation model of Nicollian and Goetzberger. With reactively sputtered Al2O3 films as a gate insulator, n-channel germanium MOS transistors are made with a high effective mobility. The effective mobility is typically more than 2000 cm2/V-sec and the gate threshold voltage is about 1 volt or less.

Interface Properties of Al2O3-Ge Structure and Characteristics of Al2O3-Ge MOS Transistors

It is possible to shift the gate threshold voltage of MOS transistors with little sacrifice of other device performances by introducing shallow level impurities only into a region near the semiconductor surface under the gate. Some theoretical information is given which may be useful for designing MOS transistors in an attempt to realize such a shift. The effects of the impurity introduction on the characteristics of MOS diode structures are also described.

Shift of the Gate Threshold Voltage of MOS Transistors dne to the Introduction of Shallow Impurities

Aluminum oxide (Al2O3) silicon MOS structures formed by DC reactive sputtering of pure aluminum in a low pressure oxygen ambient are subjected to heat treatments in various environments, and the interface characteristics of these structures are evaluated. The surface state density at the Al2O3-Si interface is found to be diminished by annealing in a nitrogen ambient, and be reduced further by additional heat treatment in a hydrogen ambient over a comparatively wide energy range.

Effect of Heat Treatment on the Interface Characteristics in Reactively Sputtered Al2O3-Si Structures

The interface characteristics of Al2O3-Si structures formed on silicon wafers by dcreactive-sputtering of aluminum in an oxygen ambient are evaluated. The presence of a dispersion of interface state time constants was found by measuring the parallel conductance of the MOS structures. An attempt is made to analyze the experimental results by using the tunneling model. We conclude that traps are distributed in the Al2O3 to a depth of 4.8A from the interface with densities of the order of 1011/eVcm2 or less. These densities were further reduced by hydrogen treatment. The electron capture cross section of the traps located at the interface is about 1.5×10-14 cm2 and that for holes is smaller by about a factor of 10.

Toshio Tanaka

Papers

Interface Properties of Al2O3-Ge Structure and Characteristics of Al2O3-Ge MOS Transistors

Shift of the Gate Threshold Voltage of MOS Transistors dne to the Introduction of Shallow Impurities

Effect of Heat Treatment on the Interface Characteristics in Reactively Sputtered Al2O3-Si Structures

Interface Characteristics of the Reactively Sputtered Al2O3-Si Structure

The Characteristics of Al-Al2O3-Si Structures Formed by Reactive Suttering