A probe card assembly includes a probe card, a space transformer having resilient contact structures (probe elements) mounted directly to (i.e., without the need for additional connecting wires or the like) and extending from terminals on a surface thereof, and an interposer disposed between the space transformer and the probe card. The space transformer and interposer are “stacked up” so that the orientation of the space transformer, hence the orientation of the tips of the probe elements, can be adjusted without changing the orientation of the probe card. Suitable mechanisms for adjusting the orientation of the space transformer, and for determining what adjustments to make, are disclosed. The interposer has resilient contact structures extending from both the top and bottom surfaces thereof, and ensures that electrical connections are maintained between the space transformer and the probe card throughout the space transformer's range of adjustment, by virtue of the interposer's inherent compliance. Multiple die sites on a semiconductor wafer are readily probed using the disclosed techniques, and the probe elements can be arranged to optimize probing of an entire wafer. Composite interconnection elements having a relatively soft core overcoated by a relatively hard shell, as the resilient contact structures are described.

Probe card assembly and kit, and methods of making same

A package includes a semiconductor chip. The semiconductor chip includes a test pad, and a plurality of microbump pads, wherein each microbump pad of the plurality of microbump pads is electrically connected to the test pad. The package further includes a substrate; and a plurality of microbumps configured to electrically connect the semiconductor chip to the substrate, wherein each microbump of the plurality of microbumps is electrically connected to a corresponding microbump pad of the plurality of microbump pads. The package further includes a package substrate, wherein the package substrate comprises a bump pad, wherein an area of the bump pad is greater than a combined area of the test pad and the plurality of microbump pads. The package further includes a bump configured to electrically connect the substrate to the package substrate.

Testing of semiconductor chips with microbumps

By doping an organic compound functioning as an electron donor (hereinafter referred to as donor molecules) into an organic compound layer contacting a cathode, donor levels can be formed between respective LUMO (lowest unoccupied molecular orbital) levels between the cathode and the organic compound layer, and therefore electrons can be injected from the cathode, and transmission of the injected electrons can be performed with good efficiency. Further, there are no problems such as excessive energy loss, deterioration of the organic compound layer itself, and the like accompanying electron movement, and therefore an increase in the electron injecting characteristics and a decrease in the driver voltage can both be achieved without depending on the work function of the cathode material.

Light Emitting Device

A packaged light emitting device includes a carrier substrate (20) having a top surface and a bottom surface, first and second conductive vias (22S, B) extending from the top surface of the substrate (20) to the bottom surface of the substrate, and a bond pad (24) on the top surface of the substrate in electrical contact with the first conductive via (22A). A diode (16) having first and second electrodes is mounted on the bond pad with the first electrode (26) is in electrical contact with the bond pad (24). A passivation layer (32) is formed on the diode (16), exposing the second electrode of the diode (16). A conductive trace (33) is formed on the top surface of the carrier substrate in electrical contact with the second conductive via (22B) and the second electrode. The conductive trace is on and extends across the passivation layer to contact the second electrode. Methods of packaging light emitting devices include providing an epiwafer including a growth substrate and an epitaxial structure on the growth substrate, bonding a carrier substrate to the epitaxial structure of the epiwafer, forming a plurality of conductive vias through the carrier substrate, defining a plurality of isolated diodes in the epitaxial structure, and electrically connecting at least one conductive via to respective ones of the plurality of isolated diodes.

Chip-scale methods for packaging light emitting devices and chip-scale packaged light emitting devices

A Group III nitride compound semiconductor light-emitting element has a reflecting surface on a side opposite to a main light-emitting surface of the element viewed from a light-emitting layer. The reflecting surface is inclined to surfaces of growth of semiconductor layers. Light emitted from the light-emitting layer is reflected by the reflecting surface, so that the reflected light emerges from side surfaces of the light-emitting element to the outside without passing through the semiconductor layers (particularly, the light-emitting layer).

Group III nitride compound semiconductor light-emitting element

A method for producing a surface-emitting laser, includes the steps of: forming a mask pattern to define a top mirror on a semiconductor substrate, the semiconductor substrate having a first semiconductor multilayer formed on the semiconductor substrate, a second semiconductor multilayer formed on the first semiconductor multilayer, and a third semiconductor multilayer formed on the second semiconductor multilayer, the first semiconductor multilayer constituting a bottom mirror, the second semiconductor layer including an upper barrier layer and a lower barrier layer, and an active layer sandwiched between the upper and lower barrier layers, the third semiconductor multilayer constituting a top mirror; forming the top mirror by partially removing the third semiconductor layer by dry etching using the mask pattern as a mask until the surface of the upper barrier layer of the second semiconductor multilayer is exposed; forming an etching protective film at least on the side of the top mirror; partially removing the active layer, the upper barrier layer, and the lower barrier layer by dry etching using the mask pattern and the etching protective film as masks; and partially removing the active layer, the upper barrier layer, and the lower barrier layer by wet etching so that the active layer has an area smaller than that of the top mirror.

Method for producing a surface-emitting laser

A method for fabricating a semiconductor device, in which a semiconductor chip having a first surface and a second surface substantially parallel to each other is mounted on a submount such that the first surface faces the submount, includes: a first step of applying resin to at least one of the semiconductor chip and the submount; a second step of applying a pressure to the semiconductor chip and the submount so that the semiconductor chip and the submount are bonded to each other by the resin, resulting in electrical connection therebetween; and a third step of performing at least one of a film formation process, an etching process, a patterning process, and a washing process for the second surface of the semiconductor chip

Method for fabricating semiconductor device

The optical module of the invention includes: a first substrate; a vertical-cavity surface-emitting laser including an upper surface, a bottom surface and a semiconductor multi-layered structure including at least a light-emitting layer, the vertical-cavity surface-emitting laser being supported on the first substrate; an electrode structure electrically connected with the bottom surface of the vertical-cavity surface-emitting laser, the electrode structure being supported on the first substrate; and a second substrate including a first bump and a second bump. In the optical module, an upper surface of the electrode structure and the upper surface of the vertical-cavity surface-emitting laser jut out from the first substrate. The second substrate is positioned with respect to the first substrate so that the first bump and the second bump come into contact with an upper surface of the electrode structure and the upper surface of the vertical-cavity surface-emitting laser, respectively.

Optical module having a vertical-cavity surface-emitting laser

A vertical-cavity surface-emitting semiconductor laser includes: a p-type bottom mirror having an upper face; a p-type spacer layer covering over the entire upper face of the p-type bottom mirror; an active region including an active layer having a bottom face smaller than the upper face of the p-type bottom mirror, the active region being formed on the p-type spacer layer; an n-type spacer layer formed on the active region; and an n-type top mirror formed on the n-type spacer layer, wherein a sum d of optical path lengths of the p-type spacer layer, the active region and the n-type spacer layer in a perpendicular direction satisfies a relationship expressed by d=(1+n)•λ/2 (n: natural number) with respect to a wavelength λ of light oscillated from the active region.

Vertical-cavity surface-emitting semiconductor laser

A semiconductor device with air-bridge interconnection comprises: a substrate; a plurality of mesas with distance therebetween smaller than a predetermined value; and a metal layer supported by the plurality of mesas, the metal layer having a narrow portion at the intermediate portion thereof and both ends having larger width than the narrow portion. The air-bridge interconnection is obtained by side-etching controlled during dry-etching using interconnection metal layer as an etching-mask to remove a mass of semiconductor material under the interconnection metal layer. A method of producing the semiconductor device comprises the steps of forming a semiconductor material; forming a metal layer on a portion of the semiconductor material having a narrow portion in the intermediate portion thereof; and forming the air-bridge interconnection by dry-etching with side-etching controlled to form a groove having a predetermined depth; then forming a resistive layer on the bottom of the layer; and then dry-etching the semiconductor material and the metal layers again to remove a mass of the semiconductor material under the metal layer.

Toyoji Chino

Papers

Method for producing a surface-emitting laser

Method for fabricating semiconductor device

Optical module having a vertical-cavity surface-emitting laser

Vertical-cavity surface-emitting semiconductor laser

Method of making semiconductor device with air-bridge interconnection