Showing papers by "Tsutomu Uesugi published in 1997"
Patent•
21 Apr 1997
TL;DR: In this article, the problem of reducing the ON-state voltage in an insulation gate type semiconductor element was addressed by using a conductance modulation effect to improve the minority carrier concentration.
Abstract: PROBLEM TO BE SOLVED: To lower ON-state voltage in an insulation gate type semiconductor element. SOLUTION: In an IGBT (insulated gate bipolar transistor) utilizing a conductance modulation effect, an n - type base layer 12 and a p-type base layer 13 are formed. In a region other than this channel forming region, a flow channel of holes of minority carrier injected from a p + type collector layer 10 is made narrower, and a buried oxide film 19 of an electrical insulation region where the minority carriers are accumulated is formed in the region of the n - type base layer 12 of high resistance near an n - type emitter layer 14. Thereby holes injected from the collector layer 10 are accumulated in the n - type base layer 12. As a result, in the base layer of the region near the emitter layer 14, minority carrier concentration is improved, so that conductance modulation degree increases, and ON-state voltage decreases. COPYRIGHT: (C)1998,JPO
11 citations
Patent•
18 Mar 1997
TL;DR: In this article, a semiconductor substrate 10 is etched from an opening of a mask film 30 to form a recessed part 34 in a forward tapered state, and a sidewall film 38 is formed selectively so as to cover a forward-tapered region of the recessed parts.
Abstract: PROBLEM TO BE SOLVED: To prevent defective crystals at a surface corner part of a trench and chamfer the corner part of the trench in a substrate SOLUTION: A semiconductor substrate 10 is etched from an opening 32 of a mask film 30 to form a recessed part 34 in a forward tapered state A sidewall film 38 is formed selectively so as to cover a forward tapered region of the recessed part 34 The lower trench part 40 is dug with the mask of the sidewall film 38 in an anisotropic etching step A heat treatment step is carried out to form a sacrificial oxide film 42 on a trench surface, and the sacrificial oxide film 42 is removed to obtain a trench 44 When the trench is used as a trench gate, a gate-insulating film 46 is formed on the trench surface, and a doping amorphous silicon as an electrode material is doped, and a heat treatment is carried out at a temperature above 900 degC In this way, the deep trench is formed, while the forward tapered region is protected by the sidewall film so the first heat treatment can be carried out after the chamfering the surface corner part, and then defects in crystal are prevented
5 citations