Umar Ibrahim Minhas

TL;DR: A WSN-based system capable of detecting and identifying events of interest and localization of miners and roof falls and a novel energy-efficient hybrid communication protocol using both periodic and aperiodic modes of communication while adhering to low latency requirement for emergency situations is proposed and implemented.

TL;DR: An approach based on an FPGA-based soft processor called Image Processing Processor (IPPro) which can operate up to 337 MHz on a high-end Xilinx FPGa family is described and details of the dataflow-based programming environment are given.

TL;DR: The aim of this work is to study the language and hardware support, and the achievable peak performance for non-standard precisions on a GPU and an FPGA, and to show that for large-enough matrices, GPUs out-perform FPGAs-based implementations but for some smaller matrix sizes, specialized FPGa floating-point operators for half and double-double precision can deliver higher throughput than implementation on aGPU.

TL;DR: The results indicate that FPGA provides better performance portability in terms of achieved percentage of device’s peak performance compared to NVIDIA GPU and also achieves better energy efficiency for some of the considered cases without requiring in-depth hardware design expertise.

TL;DR: NanoStreams is proposed, an integrated architecture comprising an ARM-based microserver coupled via a novel, low latency network interface, Nanowire to an Analytics-on-Chip architecture implemented on Field Programmable Gate Array (FPGA) technology; the architecture comprises ARM cores for performing low latency transactional processing, integrated with programmable, energy efficient Nanocore processors for high-throughput streaming analytics.