V
Vallabh Srikanth Devarapalli
Researcher at University of New Mexico
Publications - 2
Citations - 9
Vallabh Srikanth Devarapalli is an academic researcher from University of New Mexico. The author has contributed to research in topics: Electronic circuit & Frequency scaling. The author has an hindex of 1, co-authored 2 publications receiving 9 citations.
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Patent
Dual data rate flip-flop circuit
TL;DR: In this paper, a dual data rate flip-flop circuit with two or more latch circuits connected in parallel is proposed, where the outputs of the latch circuits are provided to inputs of the C-element, and a keeper circuit is connected to the c-element output.
Proceedings ArticleDOI
Scavenger: An Adaptive Design Technique for Low Power ASIC/FPGA
TL;DR: A new technique that performs the voltage scaling in conjunction with frequency scaling to achieve ultra low power design in ASIC/FPGA is proposed, which gives maximum flexibility in all three critical areas: performance, power, and robustness.