Showing papers by "Victor Polo published in 2019"
TL;DR: In this article, a lookup table (LUT)-free carrier recovery architecture for intradyne optical DPSK receivers was proposed to reduce the required digital signal processing hardware resources, power consumption as well as total process clocks, aimed at cost effective transceivers for access networks applications.
Abstract: We present a lookup table (LUT)-free carrier recovery architecture for intradyne optical DPSK receivers that reduce the required digital signal processing hardware resources, power consumption as well as total process clocks, aimed at cost-effective transceivers for access networks applications. The proposed architecture simplifies frequency compensation algorithm to avoid using m th-power operation and LUTs. We prototyped the proposed carrier recovery on a commercial FPGA for real-time evaluation with data at 1.25 Gb/s. The optical transmission system is implemented by direct-phase modulation of commercial DFB lasers, 25 km of single-mode fiber, and a coherent receiver with low-cost optical front-end based on 3 × 3 coupler and three photodiodes providing phase-diversity operation. Results show high performance in real-time, achieving –54 dBm sensitivity at BER = 10–3 as well as feed-forward frequency error correction, high robustness against the fast frequency laser drifts, and high tolerance to optical phase noise in a 6.25 GHz spaced ultradense wavelength division multiplexing grid.
3 citations