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Showing papers by "Warren B. Jackson published in 2014"


Patent
31 Jan 2014
TL;DR: In this paper, the authors describe a self-heating interface where an electrical current flowing from the first layer to the second layer of material encounters an electrical impedance greater than any electrical impedance occurring in the first and second layers of material.
Abstract: A circuit component that exhibits a region of negative differential resistance includes: a first layer of material; and a second layer of material in contact with the first layer of material, the contact forming a first self-heating interface. The first self-heating interface is structured such that an electrical current flowing from the first layer of material to the second layer of material encounters an electrical impedance occurring at the first interface that is greater than any electrical impedance occurring in the first and second layers of material, wherein heating occurring at the first interface is dominated by Joule heating caused by the electrical impedance occurring at the first interface, and wherein the electrical impedance occurring at the first interface decreases with increasing temperature to induce a region of negative differential resistance.

3 citations


Patent
30 Jan 2014
TL;DR: A nonlinear dielectric stack circuit as discussed by the authors includes a first layer of material having a first-dielectric constant, a second layer of materials having a second-dieectric constant; and a third layer sandwiched between the first layer and the second-layer of material.
Abstract: A nonlinear dielectric stack circuit element includes a first layer of material having a first dielectric constant; a second layer of material having a second dielectric constant; and a third layer of material sandwiched between the first layer of material and the second layer of material and having a third dielectric constant. The third dielectric constant has a value less than the first dielectric constant and the second dielectric constant.

3 citations


Patent
07 Mar 2014
TL;DR: In this article, a memristor device with a thermally-insulating cladding is described, which includes a first electrode, a second electrode, the memristors, and the cladding.
Abstract: A memristor device with a thermally-insulating cladding includes a first electrode, a second electrode, a memristor, and a thermally-insulating cladding. The memristor is coupled in electrical series between the first electrode and the second electrode. The thermally-insulating cladding surrounds at least a portion of the memristor.

2 citations


Patent
14 Oct 2014
TL;DR: In this paper, a feature vector for a first-deign task is proposed and an existing feature vector is retrieved for a given task and evaluated against the proposed design using task-based scores associated with each design and based on their performances for the given task.
Abstract: A proposed feature vector for a first deign is received and an existing feature vector for an existing design is retrieved for a given task. The proposed design is evaluated against the existing design using task-based scores associated with each design and based on their performances for the given task.

Patent
30 Jan 2014
TL;DR: In this article, a charge trapping memristor is described, which includes a first electrode and second electrode configured on opposite sides of a channel to generate an electric potential across the channel, and a charge barrier.
Abstract: A charge trapping memristor is disclosed. An example charge trapping memristor includes a first electrode and second electrode configured on opposite sides of a channel to generate an electric potential across the channel, and a charge barrier. The example charge trapping memristor also includes a charge trapping material configured to store and release an electric charge therein, wherein storing and releasing the electric charge changes electrical properties of the channel.