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Wei Li
Researcher at University of Bedfordshire
Publications - 13
Citations - 131
Wei Li is an academic researcher from University of Bedfordshire. The author has contributed to research in topics: Communication channel & Carrier frequency offset. The author has an hindex of 5, co-authored 13 publications receiving 90 citations. Previous affiliations of Wei Li include University of Hertfordshire.
Papers
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Proceedings ArticleDOI
Experimental 5G New Radio integration with VLC
TL;DR: This scheme combines two complementary wireless technologies: upcoming 5G NR and VLC to offer indoor enhanced wireless hybrid access able to provide each User Equipment (UE) with very high data rate and positioning support.
Journal ArticleDOI
5G Internet of Radio Light Positioning System for Indoor Broadcasting Service
Lina Shi,Dayu Shi,Xun Zhang,Benjamin Meunier,Hequn Zhang,Zhan Wang,Andrei Vladimirescu,Wei Li,Yue Zhang,John Cosmas,Kareem Ali,Nawar Jawad,Rudolf Zetik,Eric Legale,Matteo Satta,Jintao Wang,Jian Song +16 more
TL;DR: A 5G indoor positioning system is proposed for museums that utilizes unlicensed visible light of the electromagnetic spectrum to provide museum visitors with high-accuracy positioning, multiple forms of interaction services, and high-resolution multimedia delivery on a mobile device.
Journal ArticleDOI
Self-IQ-Demodulation Based Compensation Scheme of Frequency-Dependent IQ Imbalance for Wideband Direct-Conversion Transmitters
TL;DR: A low cost frequency-dependent (FD) I/Q imbalance self-compensation scheme without using external calibration instruments and guarantees low computation complexity and low cost.
Internet of radio and light: 5G building network radio and edge architecture
Yue Zhang,Hequn Zhang,John Cosmas,Nawar Jawad,Kareem Ali,Ben Meunier,Adam Kapovits,Li-Ke Huang,Wei Li,Lina Shi,Xun Zhang,Jintao Wang,Israel Koffman,Muller Robert,Charilaos C. Zarakovitis +14 more
TL;DR: The IoRL system architecture is introduced and the key technologies and techniques utilised at each layer of the system are presented by detailing the IoRL physical layer and Medium Access Control layer by means of describing their unique design characteristics and interfaces.
Journal ArticleDOI
Low Latency Parallel Turbo Decoding Implementation for Future Terrestrial Broadcasting Systems
TL;DR: A parallel turbo decoder is designed and implemented in field-programmable gate array (FPGA), a reverse address generator is proposed to reduce the complexity of interleaver and also the iteration time, and a practical method of modulo operation is realized in FPGA which can save computing resources compared with using division operation.