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Whitney J. Townsend
Researcher at University of Texas at Austin
Publications - 3
Citations - 168
Whitney J. Townsend is an academic researcher from University of Texas at Austin. The author has contributed to research in topics: Adder & Error detection and correction. The author has an hindex of 3, co-authored 3 publications receiving 155 citations.
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Proceedings ArticleDOI
A comparison of Dadda and Wallace multiplier delays
TL;DR: In this paper, a detailed analysis for several sizes of Wallace and Dadda multipliers is presented, and it is shown that despite the presence of a larger carry propagating adder, their design yields a slightly faster multiplier.
Proceedings Article
Quadruple Time Redundancy Adders
TL;DR: A concurrent error correcting adder design employing fault masking through a combination of time and hardware redundancy, Quadruple Time Redundancy results in a 40% - 55% reduction in hardware complexity while incurring a reasonable delay increase.
Proceedings ArticleDOI
On-line error detecting constant delay adder
TL;DR: An on-line error detecting adder is presented in which the redundant information serves a dual purpose, providing fault tolerance during the arithmetic operations while also providing a method by which addition is constrained to become a constant delay operation regardless of the word size of the operands.